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Searched refs:TIMER0_S_BASE (Results 1 – 25 of 109) sorted by relevance

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/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21a010f1024im32.h476 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
631 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
789 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIMER0_S base…
Defr32mg21a010f512im32.h476 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
631 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
789 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIMER0_S base…
Defr32mg21a010f768im32.h476 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
631 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
789 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIMER0_S base…
Defr32mg21a020f1024im32.h478 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
633 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
791 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIMER0_S base…
Defr32mg21a020f512im32.h478 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
633 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
791 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIMER0_S base…
Defr32mg21a020f768im32.h478 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
633 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
791 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIMER0_S base…
Defr32mg21b010f1024im32.h476 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
631 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
789 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIMER0_S base…
Defr32mg21b010f512im32.h476 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
631 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
789 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIMER0_S base…
Defr32mg21b010f768im32.h476 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
631 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
789 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIMER0_S base…
Defr32mg21b020f1024im32.h478 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
633 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
791 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIMER0_S base…
Defr32mg21b020f512im32.h478 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
633 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
791 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIMER0_S base…
Defr32mg21b020f768im32.h478 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
633 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
791 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIMER0_S base…
Drm21z000f1024im32.h474 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
629 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
787 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIMER0_S base…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22c224f512gn32.h496 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
653 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
816 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIME…
Defr32bg22c224f512im32.h496 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
653 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
816 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIME…
Defr32bg22e224f512im40.h510 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
667 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
830 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIME…
Defr32bg22c112f352gm32.h494 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
651 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
814 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIME…
Defr32bg22c224f512im40.h510 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
667 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
830 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIME…
Defr32bg22e224f512im32.h496 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
653 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
816 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIME…
Defr32bg22c112f352gm40.h508 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
665 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
828 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIME…
Defr32bg22c222f352gm32.h496 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
653 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
816 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIME…
Defr32bg22c222f352gm40.h510 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
667 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
830 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIME…
Defr32bg22c222f352gn32.h496 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
653 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
816 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIME…
Defr32bg22c224f512gm32.h496 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
653 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
816 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIME…
Defr32bg22c224f512gm40.h510 #define TIMER0_S_BASE (0x40048000UL) /* TIMER0_S base address */ macro
667 #define TIMER0_BASE (TIMER0_S_BASE) /* TIMER0 base address */
830 #define TIMER0_S ((TIMER_TypeDef *) TIMER0_S_BASE) /**< TIME…

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