Home
last modified time | relevance | path

Searched refs:SSI_MAX_CLK_DIVISION_FACTOR (Results 1 – 2 of 2) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_pll.h384 #define SSI_MAX_CLK_DIVISION_FACTOR 15 /* Maximum division factor value for SSI clock*/ macro
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_pll.c1568 if ((pCLK == NULL) || (divFactor > SSI_MAX_CLK_DIVISION_FACTOR)) { in clk_ssi_mst_clk_config()