Searched refs:SOC_PLL_500_CTRL_REG2 (Results 1 – 2 of 2) sorted by relevance
162 SPI_MEM_MAP_PLL(SOC_PLL_500_CTRL_REG2) = (uint16_t)(socPllDivFac << 9 | (pllRefClk - 1) << 3); in clk_set_soc_pll_freq()235 SPI_MEM_MAP_PLL(SOC_PLL_500_CTRL_REG2) = (uint16_t)(socPllDivFac << 9 | (pllRefClk - 1) << 3); in clk_set_soc_pll_freq()247 SPI_MEM_MAP_PLL(SOC_PLL_500_CTRL_REG2) = (uint16_t)(socPllDivFac << 9 | (pllRefClk - 1) << 3); in clk_set_soc_pll_freq()261 SPI_MEM_MAP_PLL(SOC_PLL_500_CTRL_REG2) = (uint16_t)(socPllDivFac << 9 | (pllRefClk - 1) << 3); in clk_set_soc_pll_freq()325 SPI_MEM_MAP_PLL(SOC_PLL_500_CTRL_REG2) = (uint16_t)(divFactor << 9 | nFactor << 3); in clk_soc_pll_set_freq_div()365 SPI_MEM_MAP_PLL(SOC_PLL_500_CTRL_REG2) = (uint16_t)(divFactor << 9 | nFactor << 3); in clk_soc_pll_set_freq_div()
204 #define SOC_PLL_500_CTRL_REG2 0x11 /* Address for SOC_PLL_500_CTRL_REG2 register Access*/ macro
