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Searched refs:SOC_PLL_500_CTRL_REG12 (Results 1 – 2 of 2) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_pll.h214 #define SOC_PLL_500_CTRL_REG12 0x1B /* Address for SOC_PLL_500_CTRL_REG12 register Access*/ macro
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_pll.c175 socPllTvRead = (SPI_MEM_MAP_PLL(SOC_PLL_500_CTRL_REG12) & 0xF800) >> 11; in clk_set_soc_pll_freq()
342 socPllTvRead = (SPI_MEM_MAP_PLL(SOC_PLL_500_CTRL_REG12) & 0xF800) >> 11; in clk_soc_pll_set_freq_div()