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Searched refs:SOC_PLL_500_CTRL_REG11 (Results 1 – 2 of 2) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_pll.h213 #define SOC_PLL_500_CTRL_REG11 0x1A /* Address for SOC_PLL_500_CTRL_REG11 register Access*/ macro
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_pll.c390 SPI_MEM_MAP_PLL(SOC_PLL_500_CTRL_REG11) = 0xFFFF; in clk_soc_pll_clk_set()
426 SPI_MEM_MAP_PLL(SOC_PLL_500_CTRL_REG11) = 0x01FF; in clk_soc_pll_clk_reset()