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Searched refs:SMU_PPUSATD1_SMU (Results 1 – 16 of 16) sorted by relevance

/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG22/Source/
Dsystem_efr32bg22.c184 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & (~SMU_PPUSATD1_SMU & ~SMU_PPUSATD1_SEMAILBOX)); in SystemInit()
186 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & ~SMU_PPUSATD1_SMU); in SystemInit()
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG29/Source/
Dsystem_efr32mg29.c184 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & (~SMU_PPUSATD1_SMU & ~SMU_PPUSATD1_SEMAILBOX)); in SystemInit()
186 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & ~SMU_PPUSATD1_SMU); in SystemInit()
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG29/Source/
Dsystem_efr32bg29.c184 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & (~SMU_PPUSATD1_SMU & ~SMU_PPUSATD1_SEMAILBOX)); in SystemInit()
186 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & ~SMU_PPUSATD1_SMU); in SystemInit()
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG27/Source/
Dsystem_efr32bg27.c184 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & (~SMU_PPUSATD1_SMU & ~SMU_PPUSATD1_SEMAILBOX)); in SystemInit()
186 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & ~SMU_PPUSATD1_SMU); in SystemInit()
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32FG23/Source/
Dsystem_efr32fg23.c184 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & (~SMU_PPUSATD1_SMU & ~SMU_PPUSATD1_SEMAILBOX)); in SystemInit()
186 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & ~SMU_PPUSATD1_SMU); in SystemInit()
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG21/Source/
Dsystem_efr32mg21.c183 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & (~SMU_PPUSATD1_SMU & ~SMU_PPUSATD1_SEMAILBOX)); in SystemInit()
185 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & ~SMU_PPUSATD1_SMU); in SystemInit()
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32ZG23/Source/
Dsystem_efr32zg23.c184 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & (~SMU_PPUSATD1_SMU & ~SMU_PPUSATD1_SEMAILBOX)); in SystemInit()
186 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & ~SMU_PPUSATD1_SMU); in SystemInit()
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG24/Source/
Dsystem_efr32mg24.c184 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & (~SMU_PPUSATD1_SMU & ~SMU_PPUSATD1_SEMAILBOX)); in SystemInit()
186 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & ~SMU_PPUSATD1_SMU); in SystemInit()
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_smu.h746 #define SMU_PPUSATD1_SMU (0x1UL << 11) /**< SMU … macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_smu.h716 #define SMU_PPUSATD1_SMU (0x1UL << 5) /**< SMU … macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG29/Include/
Defr32mg29_smu.h741 #define SMU_PPUSATD1_SMU (0x1UL << 6) /**< SMU … macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG29/Include/
Defr32bg29_smu.h741 #define SMU_PPUSATD1_SMU (0x1UL << 6) /**< SMU … macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_smu.h741 #define SMU_PPUSATD1_SMU (0x1UL << 7) /**< SMU … macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32FG23/Include/
Defr32fg23_smu.h781 #define SMU_PPUSATD1_SMU (0x1UL << 7) /**< SMU S… macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32ZG23/Include/
Defr32zg23_smu.h781 #define SMU_PPUSATD1_SMU (0x1UL << 7) /**< SMU S… macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_smu.h746 #define SMU_PPUSATD1_SMU (0x1UL << 3) /**< SMU S… macro