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Searched refs:SMU_PPUPATD1_TIMER2 (Results 1 – 25 of 64) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_smu.h329 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b390f1024gl112.h7769 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b390f512gl112.h7769 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b530f512il120.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b530f512im64.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b530f512iq100.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b530f512iq64.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b530f512gq100.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b530f512gq64.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b530f512il112.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b110f1024gm64.h8536 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b110f1024gq64.h8536 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b530f512gl112.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b530f512gl120.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b530f512gm64.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b510f1024gq100.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b510f1024gq64.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b510f1024gl112.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b510f1024gl120.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b510f1024gm64.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b510f1024il112.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b510f1024il120.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b510f1024im64.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
Defm32gg12b510f1024iq100.h8572 #define SMU_PPUPATD1_TIMER2 (0x1UL << 12) /**< Timer 2 acces… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_smu.h339 #define SMU_PPUPATD1_TIMER2 (0x1UL << 11) /**< Timer 2 acces… macro

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