1 //------------------------------------------------------------------------------ 2 // Copyright 2012 (c) Silicon Laboratories Inc. 3 // 4 // SPDX-License-Identifier: Zlib 5 // 6 // This siHAL software is provided 'as-is', without any express or implied 7 // warranty. In no event will the authors be held liable for any damages 8 // arising from the use of this software. 9 // 10 // Permission is granted to anyone to use this software for any purpose, 11 // including commercial applications, and to alter it and redistribute it 12 // freely, subject to the following restrictions: 13 // 14 // 1. The origin of this software must not be misrepresented; you must not 15 // claim that you wrote the original software. If you use this software 16 // in a product, an acknowledgment in the product documentation would be 17 // appreciated but is not required. 18 // 2. Altered source versions must be plainly marked as such, and must not be 19 // misrepresented as being the original software. 20 // 3. This notice may not be removed or altered from any source distribution. 21 //------------------------------------------------------------------------------ 22 /// @file SI32_USBEP_A_Type.h 23 // 24 // Script: 0.58 25 // HAL Source: 0.5 26 // Version: 1 27 28 #ifndef __SI32_USBEP_A_TYPE_H__ 29 #define __SI32_USBEP_A_TYPE_H__ 30 31 // compiler dependencies 32 #include <stdbool.h> 33 #include "si32WideTypes.h" 34 35 // register definitions 36 #include "SI32_USBEP_A_Registers.h" 37 38 #define SI32_USBEP_A_EPCONTROL_ALWAYS_SET_ON_WRITE_MASK \ 39 ( SI32_USBEP_A_EPCONTROL_OPRDYI_SET_U32 | \ 40 SI32_USBEP_A_EPCONTROL_OSTSTLI_SET_U32 | \ 41 SI32_USBEP_A_EPCONTROL_OORF_SET_U32 | \ 42 SI32_USBEP_A_EPCONTROL_ISTSTLI_SET_U32 | \ 43 SI32_USBEP_A_EPCONTROL_IURF_SET_U32 ) 44 45 #define SI32_USBEP_A_EPCONTROL_ALWAYS_CLEAR_ON_WRITE_MASK \ 46 ( SI32_USBEP_A_EPCONTROL_IFIFOFL_SET_VALUE | \ 47 SI32_USBEP_A_EPCONTROL_OFIFOFL_SET_VALUE ) \ 48 49 #define USBEP_EPCONTROL_WRITE(basePointer, _U32) ( (_U32) | (basePointer->EPCONTROL.U32|SI32_USBEP_A_EPCONTROL_ALWAYS_SET_ON_WRITE_MASK)) 50 #define USBEP_EPCONTROL_CLEAR_MASK( basePointer, _MASK) ( USBEP_EPCONTROL_WRITE(basePointer, 0)&(~(_MASK))) 51 #define USBEP_EPCONTROL_SET_MASK( basePointer, _MASK) ( USBEP_EPCONTROL_WRITE(basePointer, 0)|(_MASK) ) 52 53 54 #ifdef __cplusplus 55 extern "C" { 56 #endif 57 58 59 /// @fn _SI32_USBEP_A_initialize(SI32_USBEP_A_Type* basePointer, 60 /// uint32_t epmpsize, 61 /// uint32_t epcontrol) 62 /// 63 /// @param[in] 64 /// basePointer 65 /// 66 /// @param[in] 67 /// epmpsize 68 /// Valid range is 32 bits. 69 /// Write to EPMPSIZE register. 70 /// 71 /// @param[in] 72 /// epcontrol 73 /// Valid range is 32 bits. 74 /// Write to EPCONTROL register. 75 /// 76 void 77 _SI32_USBEP_A_initialize(SI32_USBEP_A_Type* /*basePointer*/, 78 uint32_t, /*epmpsize*/ 79 uint32_t /*epcontrol*/); 80 /// 81 /// @def SI32_USBEP_A_initialize(basePointer, epmpsize, epcontrol) 82 #define SI32_USBEP_A_initialize(basePointer, epmpsize, epcontrol) do{ \ 83 basePointer->EPMPSIZE.U32 = epmpsize;\ 84 basePointer->EPCONTROL.U32 = epcontrol;\ 85 } while(0) 86 87 88 /// @fn _SI32_USBEP_A_write_epmpsize(SI32_USBEP_A_Type* basePointer, 89 /// uint32_t epmpsize) 90 /// 91 /// @brief 92 /// Writes to EPMPSIZE register. 93 /// 94 /// @param[in] 95 /// basePointer 96 /// 97 /// @param[in] 98 /// epmpsize 99 /// Valid range is 32 bits. 100 /// 101 void 102 _SI32_USBEP_A_write_epmpsize(SI32_USBEP_A_Type* /*basePointer*/, 103 uint32_t /*epmpsize*/); 104 /// 105 /// @def SI32_USBEP_A_write_epmpsize(basePointer, epmpsize) 106 #define SI32_USBEP_A_write_epmpsize(basePointer, epmpsize) \ 107 (basePointer->EPMPSIZE.U32 = epmpsize) 108 109 110 /// @fn _SI32_USBEP_A_read_epmpsize(SI32_USBEP_A_Type* basePointer) 111 /// 112 /// @brief 113 /// Reads EPMPSIZE register. 114 /// 115 /// @param[in] 116 /// basePointer 117 /// 118 uint32_t 119 _SI32_USBEP_A_read_epmpsize(SI32_USBEP_A_Type* /*basePointer*/); 120 /// 121 /// @def SI32_USBEP_A_read_epmpsize(basePointer) 122 #define SI32_USBEP_A_read_epmpsize(basePointer) \ 123 (basePointer->EPMPSIZE.U32) 124 125 126 /// @fn _SI32_USBEP_A_set_in_max_packet_size(SI32_USBEP_A_Type* basePointer, 127 /// uint32_t size) 128 /// 129 /// @param[in] 130 /// basePointer 131 /// 132 /// @param[in] 133 /// size 134 /// Valid range is 8 bits. 135 /// Sets size in increments of 8, and a value of 128 is interpreted as 136 /// 1023 bytes. 137 /// 138 void 139 _SI32_USBEP_A_set_in_max_packet_size(SI32_USBEP_A_Type* /*basePointer*/, 140 uint32_t /*size*/); 141 /// 142 /// @def SI32_USBEP_A_set_in_max_packet_size(basePointer, size) 143 #define SI32_USBEP_A_set_in_max_packet_size(basePointer, size) \ 144 (basePointer->EPMPSIZE.IMAXP = size) 145 146 147 /// @fn _SI32_USBEP_A_get_in_max_packet_size(SI32_USBEP_A_Type* basePointer) 148 /// 149 /// @return 150 /// Return size which is IMAXP bits * 8 if IMAXP < 128, or 1023 bytes if 151 /// IMAXP = 128. 152 /// 153 /// @param[in] 154 /// basePointer 155 /// 156 uint32_t 157 _SI32_USBEP_A_get_in_max_packet_size(SI32_USBEP_A_Type* /*basePointer*/); 158 /// 159 /// @def SI32_USBEP_A_get_in_max_packet_size(basePointer) 160 #define SI32_USBEP_A_get_in_max_packet_size(basePointer) \ 161 ((uint32_t) (basePointer->EPMPSIZE.IMAXP)) 162 163 164 /// @fn _SI32_USBEP_A_set_out_max_packet_size(SI32_USBEP_A_Type* basePointer, 165 /// uint32_t size) 166 /// 167 /// @param[in] 168 /// basePointer 169 /// 170 /// @param[in] 171 /// size 172 /// Valid range is 8 bits. 173 /// Sets size in increments of 8, and a value of 128 is interpreted as 174 /// 1023 bytes. 175 /// 176 void 177 _SI32_USBEP_A_set_out_max_packet_size(SI32_USBEP_A_Type* /*basePointer*/, 178 uint32_t /*size*/); 179 /// 180 /// @def SI32_USBEP_A_set_out_max_packet_size(basePointer, size) 181 #define SI32_USBEP_A_set_out_max_packet_size(basePointer, size) \ 182 (basePointer->EPMPSIZE.OMAXP = size) 183 184 185 /// @fn _SI32_USBEP_A_get_out_max_packet_size(SI32_USBEP_A_Type* basePointer) 186 /// 187 /// @return 188 /// Return size which is OMAXP bits * 8 if OMAXP < 128, or 1023 bytes if 189 /// OMAXP = 128. 190 /// 191 /// @param[in] 192 /// basePointer 193 /// 194 uint32_t 195 _SI32_USBEP_A_get_out_max_packet_size(SI32_USBEP_A_Type* /*basePointer*/); 196 /// 197 /// @def SI32_USBEP_A_get_out_max_packet_size(basePointer) 198 #define SI32_USBEP_A_get_out_max_packet_size(basePointer) \ 199 ((uint32_t) (basePointer->EPMPSIZE.OMAXP)) 200 201 202 /// @fn _SI32_USBEP_A_write_epcontrol(SI32_USBEP_A_Type* basePointer, 203 /// uint32_t epcontrol) 204 /// 205 /// @brief 206 /// Writes to EPCONTROL register. 207 /// 208 /// @param[in] 209 /// basePointer 210 /// 211 /// @param[in] 212 /// epcontrol 213 /// Valid range is 32 bits. 214 /// 215 void 216 _SI32_USBEP_A_write_epcontrol(SI32_USBEP_A_Type* /*basePointer*/, 217 uint32_t /*epcontrol*/); 218 /// 219 /// @def SI32_USBEP_A_write_epcontrol(basePointer, epcontrol) 220 #define SI32_USBEP_A_write_epcontrol(basePointer, epcontrol) \ 221 (basePointer->EPCONTROL.U32 = epcontrol) 222 223 224 /// @fn _SI32_USBEP_A_read_epcontrol(SI32_USBEP_A_Type* basePointer) 225 /// 226 /// @brief 227 /// Read EPCONTROL register. 228 /// 229 /// @param[in] 230 /// basePointer 231 /// 232 uint32_t 233 _SI32_USBEP_A_read_epcontrol(SI32_USBEP_A_Type* /*basePointer*/); 234 /// 235 /// @def SI32_USBEP_A_read_epcontrol(basePointer) 236 #define SI32_USBEP_A_read_epcontrol(basePointer) \ 237 (basePointer->EPCONTROL.U32) 238 239 240 /// @fn _SI32_USBEP_A_set_in_packet_ready(SI32_USBEP_A_Type* basePointer) 241 /// 242 /// @param[in] 243 /// basePointer 244 /// 245 void 246 _SI32_USBEP_A_set_in_packet_ready(SI32_USBEP_A_Type* /*basePointer*/); 247 /// 248 /// @def SI32_USBEP_A_set_in_packet_ready(basePointer) 249 #define SI32_USBEP_A_set_in_packet_ready(basePointer) \ 250 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_WRITE(basePointer, SI32_USBEP_A_EPCONTROL_IPRDYI_SET_U32)) 251 252 253 /// @fn _SI32_USBEP_A_is_in_fifo_empty(SI32_USBEP_A_Type* basePointer) 254 /// 255 /// @brief 256 /// Returns TRUE if FIFO empty, otherwise returns FALSE. 257 /// 258 /// @param[in] 259 /// basePointer 260 /// 261 bool 262 _SI32_USBEP_A_is_in_fifo_empty(SI32_USBEP_A_Type* /*basePointer*/); 263 /// 264 /// @def SI32_USBEP_A_is_in_fifo_empty(basePointer) 265 #define SI32_USBEP_A_is_in_fifo_empty(basePointer) \ 266 ((bool) !(basePointer->EPCONTROL.IFIFONEF)) 267 268 269 /// @fn _SI32_USBEP_A_clear_in_data_underrun(SI32_USBEP_A_Type* basePointer) 270 /// 271 /// @param[in] 272 /// basePointer 273 /// 274 void 275 _SI32_USBEP_A_clear_in_data_underrun(SI32_USBEP_A_Type* /*basePointer*/); 276 /// 277 /// @def SI32_USBEP_A_clear_in_data_underrun(basePointer) 278 #define SI32_USBEP_A_clear_in_data_underrun(basePointer) \ 279 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_CLEAR_MASK( basePointer, SI32_USBEP_A_EPCONTROL_IURF_MASK)) 280 281 282 /// @fn _SI32_USBEP_A_is_in_data_underrun_set(SI32_USBEP_A_Type* basePointer) 283 /// 284 /// @brief 285 /// In Isochronous mode, True indicates a zero length packet sent after an 286 /// IN. In Interrupt/Bulk mode, True indicates a NAK sent in response to 287 /// an IN token. 288 /// 289 /// @param[in] 290 /// basePointer 291 /// 292 bool 293 _SI32_USBEP_A_is_in_data_underrun_set(SI32_USBEP_A_Type* /*basePointer*/); 294 /// 295 /// @def SI32_USBEP_A_is_in_data_underrun_set(basePointer) 296 #define SI32_USBEP_A_is_in_data_underrun_set(basePointer) \ 297 ((bool)(basePointer->EPCONTROL.IURF)) 298 299 300 /// @fn _SI32_USBEP_A_flush_in_fifo(SI32_USBEP_A_Type* basePointer) 301 /// 302 /// @param[in] 303 /// basePointer 304 /// 305 void 306 _SI32_USBEP_A_flush_in_fifo(SI32_USBEP_A_Type* /*basePointer*/); 307 /// 308 /// @def SI32_USBEP_A_flush_in_fifo(basePointer) 309 #define SI32_USBEP_A_flush_in_fifo(basePointer) \ 310 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_WRITE(basePointer, SI32_USBEP_A_EPCONTROL_IFIFOFL_SET_U32)) 311 312 /// @fn _SI32_USBEP_A_send_in_stall(SI32_USBEP_A_Type* basePointer) 313 /// 314 /// @param[in] 315 /// basePointer 316 /// 317 void 318 _SI32_USBEP_A_send_in_stall(SI32_USBEP_A_Type* /*basePointer*/); 319 /// 320 /// @def SI32_USBEP_A_send_in_stall(basePointer) 321 #define SI32_USBEP_A_send_in_stall(basePointer) \ 322 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_WRITE(basePointer, SI32_USBEP_A_EPCONTROL_ISDSTL_SET_U32)) 323 324 325 /// @fn _SI32_USBEP_A_stop_in_stall(SI32_USBEP_A_Type* basePointer) 326 /// 327 /// @param[in] 328 /// basePointer 329 /// 330 void 331 _SI32_USBEP_A_stop_in_stall(SI32_USBEP_A_Type* /*basePointer*/); 332 /// 333 /// @def SI32_USBEP_A_stop_in_stall(basePointer) 334 #define SI32_USBEP_A_stop_in_stall(basePointer) \ 335 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_CLEAR_MASK(basePointer, SI32_USBEP_A_EPCONTROL_ISDSTL_MASK)) 336 337 338 /// @fn _SI32_USBEP_A_is_in_stall_sent(SI32_USBEP_A_Type* basePointer) 339 /// 340 /// @brief 341 /// Returns TRUE if stall transmitted, otherwise returns FALSE. 342 /// 343 /// @param[in] 344 /// basePointer 345 /// 346 bool 347 _SI32_USBEP_A_is_in_stall_sent(SI32_USBEP_A_Type* /*basePointer*/); 348 /// 349 /// @def SI32_USBEP_A_is_in_stall_sent(basePointer) 350 #define SI32_USBEP_A_is_in_stall_sent(basePointer) \ 351 ((bool) (basePointer->EPCONTROL.ISTSTLI)) 352 353 354 /// @fn _SI32_USBEP_A_clear_in_stall_sent(SI32_USBEP_A_Type* basePointer) 355 /// 356 /// @param[in] 357 /// basePointer 358 /// 359 void 360 _SI32_USBEP_A_clear_in_stall_sent(SI32_USBEP_A_Type* /*basePointer*/); 361 /// 362 /// @def SI32_USBEP_A_clear_in_stall_sent(basePointer) 363 #define SI32_USBEP_A_clear_in_stall_sent(basePointer) \ 364 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_CLEAR_MASK(basePointer, SI32_USBEP_A_EPCONTROL_ISTSTLI_MASK)) 365 366 367 /// @fn _SI32_USBEP_A_reset_in_data_toggle(SI32_USBEP_A_Type* basePointer) 368 /// 369 /// @param[in] 370 /// basePointer 371 /// 372 void 373 _SI32_USBEP_A_reset_in_data_toggle(SI32_USBEP_A_Type* /*basePointer*/); 374 /// 375 /// @def SI32_USBEP_A_reset_in_data_toggle(basePointer) 376 #define SI32_USBEP_A_reset_in_data_toggle(basePointer) \ 377 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_WRITE(basePointer, SI32_USBEP_A_EPCONTROL_ICLRDT_RESET_U32)) 378 379 380 /// @fn _SI32_USBEP_A_enable_split_mode(SI32_USBEP_A_Type* basePointer) 381 /// 382 /// @param[in] 383 /// basePointer 384 /// 385 void 386 _SI32_USBEP_A_enable_split_mode(SI32_USBEP_A_Type* /*basePointer*/); 387 /// 388 /// @def SI32_USBEP_A_enable_split_mode(basePointer) 389 #define SI32_USBEP_A_enable_split_mode(basePointer) \ 390 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_WRITE(basePointer, SI32_USBEP_A_EPCONTROL_SPLITEN_ENABLED_U32)) 391 392 393 /// @fn _SI32_USBEP_A_disable_split_mode(SI32_USBEP_A_Type* basePointer) 394 /// 395 /// @param[in] 396 /// basePointer 397 /// 398 void 399 _SI32_USBEP_A_disable_split_mode(SI32_USBEP_A_Type* /*basePointer*/); 400 /// 401 /// @def SI32_USBEP_A_disable_split_mode(basePointer) 402 #define SI32_USBEP_A_disable_split_mode(basePointer) \ 403 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_CLEAR_MASK(basePointer, SI32_USBEP_A_EPCONTROL_SPLITEN_MASK)) 404 405 /// @fn _SI32_USBEP_A_select_data_toggle_on_ack(SI32_USBEP_A_Type* basePointer) 406 /// 407 /// @param[in] 408 /// basePointer 409 /// 410 void 411 _SI32_USBEP_A_select_data_toggle_on_ack(SI32_USBEP_A_Type* /*basePointer*/); 412 /// 413 /// @def SI32_USBEP_A_select_data_toggle_on_ack(basePointer) 414 #define SI32_USBEP_A_select_data_toggle_on_ack(basePointer) \ 415 (basePointer->EPCONTROL.FDTEN = USBEP_EPCONTROL_CLEAR_MASK(basePointer, SI32_USBEP_A_EPCONTROL_FDTEN_MASK)) 416 417 418 /// @fn _SI32_USBEP_A_select_data_toggle_on_packet(SI32_USBEP_A_Type* basePointer) 419 /// 420 /// @param[in] 421 /// basePointer 422 /// 423 void 424 _SI32_USBEP_A_select_data_toggle_on_packet(SI32_USBEP_A_Type* /*basePointer*/); 425 /// 426 /// @def SI32_USBEP_A_select_data_toggle_on_packet(basePointer) 427 #define SI32_USBEP_A_select_data_toggle_on_packet(basePointer) \ 428 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_WRITE(basePointer, SI32_USBEP_A_EPCONTROL_FDTEN_ENABLED_U32)) 429 430 431 /// @fn _SI32_USBEP_A_enable_in_dma(SI32_USBEP_A_Type* basePointer) 432 /// 433 /// @param[in] 434 /// basePointer 435 /// 436 void 437 _SI32_USBEP_A_enable_in_dma(SI32_USBEP_A_Type* /*basePointer*/); 438 /// 439 /// @def SI32_USBEP_A_enable_in_dma(basePointer) 440 #define SI32_USBEP_A_enable_in_dma(basePointer) \ 441 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_WRITE(basePointer, SI32_USBEP_A_EPCONTROL_IDMAEN_ENABLED_U32)) 442 443 444 /// @fn _SI32_USBEP_A_disable_in_dma(SI32_USBEP_A_Type* basePointer) 445 /// 446 /// @param[in] 447 /// basePointer 448 /// 449 void 450 _SI32_USBEP_A_disable_in_dma(SI32_USBEP_A_Type* /*basePointer*/); 451 /// 452 /// @def SI32_USBEP_A_disable_in_dma(basePointer) 453 #define SI32_USBEP_A_disable_in_dma(basePointer) \ 454 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_CLEAR_MASK(basePointer, SI32_USBEP_A_EPCONTROL_IDMAEN_MASK)) 455 456 457 /// @fn _SI32_USBEP_A_set_endpoint_direction_in(SI32_USBEP_A_Type* basePointer) 458 /// 459 /// @brief 460 /// Only valid when endpoint not configured for SPLIT mode. 461 /// 462 /// @param[in] 463 /// basePointer 464 /// 465 void 466 _SI32_USBEP_A_set_endpoint_direction_in(SI32_USBEP_A_Type* /*basePointer*/); 467 /// 468 /// @def SI32_USBEP_A_set_endpoint_direction_in(basePointer) 469 #define SI32_USBEP_A_set_endpoint_direction_in(basePointer) \ 470 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_WRITE(basePointer, SI32_USBEP_A_EPCONTROL_DIRSEL_IN_U32)) 471 472 473 /// @fn _SI32_USBEP_A_set_endpoint_direction_out(SI32_USBEP_A_Type* basePointer) 474 /// 475 /// @brief 476 /// Only valid when endpoint not configured for SPLIT mode. 477 /// 478 /// @param[in] 479 /// basePointer 480 /// 481 void 482 _SI32_USBEP_A_set_endpoint_direction_out(SI32_USBEP_A_Type* /*basePointer*/); 483 /// 484 /// @def SI32_USBEP_A_set_endpoint_direction_out(basePointer) 485 #define SI32_USBEP_A_set_endpoint_direction_out(basePointer) \ 486 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_CLEAR_MASK(basePointer, SI32_USBEP_A_EPCONTROL_DIRSEL_MASK)) 487 488 489 /// @fn _SI32_USBEP_A_select_in_bulk_interrupt_mode(SI32_USBEP_A_Type* basePointer) 490 /// 491 /// @param[in] 492 /// basePointer 493 /// 494 void 495 _SI32_USBEP_A_select_in_bulk_interrupt_mode(SI32_USBEP_A_Type* /*basePointer*/); 496 /// 497 /// @def SI32_USBEP_A_select_in_bulk_interrupt_mode(basePointer) 498 #define SI32_USBEP_A_select_in_bulk_interrupt_mode(basePointer) \ 499 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_CLEAR_MASK(basePointer, SI32_USBEP_A_EPCONTROL_IISOEN_MASK)) 500 501 502 /// @fn _SI32_USBEP_A_select_in_isochronous_mode(SI32_USBEP_A_Type* basePointer) 503 /// 504 /// @param[in] 505 /// basePointer 506 /// 507 void 508 _SI32_USBEP_A_select_in_isochronous_mode(SI32_USBEP_A_Type* /*basePointer*/); 509 /// 510 /// @def SI32_USBEP_A_select_in_isochronous_mode(basePointer) 511 #define SI32_USBEP_A_select_in_isochronous_mode(basePointer) \ 512 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_WRITE(basePointer, SI32_USBEP_A_EPCONTROL_IISOEN_ISO_U32)) 513 514 515 /// @fn _SI32_USBEP_A_enable_inprdy_auto_set(SI32_USBEP_A_Type* basePointer) 516 /// 517 /// @brief 518 /// Allows In Packet Ready Bit (INPRDY) to be automatically set by 519 /// hardware. 520 /// 521 /// @param[in] 522 /// basePointer 523 /// 524 void 525 _SI32_USBEP_A_enable_inprdy_auto_set(SI32_USBEP_A_Type* /*basePointer*/); 526 /// 527 /// @def SI32_USBEP_A_enable_inprdy_auto_set(basePointer) 528 #define SI32_USBEP_A_enable_inprdy_auto_set(basePointer) \ 529 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_WRITE(basePointer, SI32_USBEP_A_EPCONTROL_AUTOSETEN_ENABLED_U32)) 530 531 532 /// @fn _SI32_USBEP_A_disable_inprdy_auto_set(SI32_USBEP_A_Type* basePointer) 533 /// 534 /// @brief 535 /// Prevents In Packet Ready Bit (INPRDY) from being automatically set by 536 /// hardware. 537 /// 538 /// @param[in] 539 /// basePointer 540 /// 541 void 542 _SI32_USBEP_A_disable_inprdy_auto_set(SI32_USBEP_A_Type* /*basePointer*/); 543 /// 544 /// @def SI32_USBEP_A_disable_inprdy_auto_set(basePointer) 545 #define SI32_USBEP_A_disable_inprdy_auto_set(basePointer) \ 546 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_CLEAR_MASK(basePointer, SI32_USBEP_A_EPCONTROL_AUTOSETEN_MASK)) 547 548 549 /// @fn _SI32_USBEP_A_clear_outpacket_ready(SI32_USBEP_A_Type* basePointer) 550 /// 551 /// @param[in] 552 /// basePointer 553 /// 554 void 555 _SI32_USBEP_A_clear_outpacket_ready(SI32_USBEP_A_Type* /*basePointer*/); 556 /// 557 /// @def SI32_USBEP_A_clear_outpacket_ready(basePointer) 558 #define SI32_USBEP_A_clear_outpacket_ready(basePointer) \ 559 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_CLEAR_MASK( basePointer, SI32_USBEP_A_EPCONTROL_OPRDYI_MASK)) 560 561 562 /// @fn _SI32_USBEP_A_is_outpacket_ready(SI32_USBEP_A_Type* basePointer) 563 /// 564 /// @brief 565 /// Returns TRUE if OPRDY is set, otherwise returns FALSE. 566 /// 567 /// @param[in] 568 /// basePointer 569 /// 570 bool 571 _SI32_USBEP_A_is_outpacket_ready(SI32_USBEP_A_Type* /*basePointer*/); 572 /// 573 /// @def SI32_USBEP_A_is_outpacket_ready(basePointer) 574 #define SI32_USBEP_A_is_outpacket_ready(basePointer) \ 575 ((bool)(basePointer->EPCONTROL.OPRDYI)) 576 577 578 /// @fn _SI32_USBEP_A_is_out_fifo_full(SI32_USBEP_A_Type* basePointer) 579 /// 580 /// @brief 581 /// Returns TRUE if FIFO is full, otherwise returns FALSE. If double 582 /// buffering is enabled, FIFO is full when FIFO contains two packets. 583 /// 584 /// @param[in] 585 /// basePointer 586 /// 587 bool 588 _SI32_USBEP_A_is_out_fifo_full(SI32_USBEP_A_Type* /*basePointer*/); 589 /// 590 /// @def SI32_USBEP_A_is_out_fifo_full(basePointer) 591 #define SI32_USBEP_A_is_out_fifo_full(basePointer) \ 592 ((bool)(basePointer->EPCONTROL.OFIFOFF)) 593 594 595 /// @fn _SI32_USBEP_A_clear_out_data_overrun(SI32_USBEP_A_Type* basePointer) 596 /// 597 /// @param[in] 598 /// basePointer 599 /// 600 void 601 _SI32_USBEP_A_clear_out_data_overrun(SI32_USBEP_A_Type* /*basePointer*/); 602 /// 603 /// @def SI32_USBEP_A_clear_out_data_overrun(basePointer) 604 #define SI32_USBEP_A_clear_out_data_overrun(basePointer) \ 605 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_CLEAR_MASK( basePointer, SI32_USBEP_A_EPCONTROL_OORF_MASK)) 606 607 608 /// @fn _SI32_USBEP_A_has_out_data_overrun_occurred(SI32_USBEP_A_Type* basePointer) 609 /// 610 /// @brief 611 /// Returns TRUE if data packets lost due to FIFO overrun, otherwise 612 /// returns FALSE. 613 /// 614 /// @param[in] 615 /// basePointer 616 /// 617 bool 618 _SI32_USBEP_A_has_out_data_overrun_occurred(SI32_USBEP_A_Type* /*basePointer*/); 619 /// 620 /// @def SI32_USBEP_A_has_out_data_overrun_occurred(basePointer) 621 #define SI32_USBEP_A_has_out_data_overrun_occurred(basePointer) \ 622 ((bool) (basePointer->EPCONTROL.OORF)) 623 624 625 /// @fn _SI32_USBEP_A_has_out_data_error_set_occurred(SI32_USBEP_A_Type* basePointer) 626 /// 627 /// @brief 628 /// Returns TRUE if CRC or bit error occurred, otherwise returns FALSE. 629 /// Only valid in isochronous mode. 630 /// 631 /// @param[in] 632 /// basePointer 633 /// 634 bool 635 _SI32_USBEP_A_has_out_data_error_set_occurred(SI32_USBEP_A_Type* /*basePointer*/); 636 /// 637 /// @def SI32_USBEP_A_has_out_data_error_set_occurred(basePointer) 638 #define SI32_USBEP_A_has_out_data_error_set_occurred(basePointer) \ 639 ((bool) (basePointer->EPCONTROL.ODERRF)) 640 641 642 /// @fn _SI32_USBEP_A_flush_out_fifo(SI32_USBEP_A_Type* basePointer) 643 /// 644 /// @param[in] 645 /// basePointer 646 /// 647 void 648 _SI32_USBEP_A_flush_out_fifo(SI32_USBEP_A_Type* /*basePointer*/); 649 /// 650 /// @def SI32_USBEP_A_flush_out_fifo(basePointer) 651 #define SI32_USBEP_A_flush_out_fifo(basePointer) \ 652 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_WRITE(basePointer, SI32_USBEP_A_EPCONTROL_OFIFOFL_SET_U32)) 653 654 655 /// @fn _SI32_USBEP_A_send_out_stall(SI32_USBEP_A_Type* basePointer) 656 /// 657 /// @param[in] 658 /// basePointer 659 /// 660 void 661 _SI32_USBEP_A_send_out_stall(SI32_USBEP_A_Type* /*basePointer*/); 662 /// 663 /// @def SI32_USBEP_A_send_out_stall(basePointer) 664 #define SI32_USBEP_A_send_out_stall(basePointer) \ 665 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_WRITE(basePointer, SI32_USBEP_A_EPCONTROL_OSDSTL_SEND_U32)) 666 667 668 /// @fn _SI32_USBEP_A_stop_out_stall(SI32_USBEP_A_Type* basePointer) 669 /// 670 /// @param[in] 671 /// basePointer 672 /// 673 void 674 _SI32_USBEP_A_stop_out_stall(SI32_USBEP_A_Type* /*basePointer*/); 675 /// 676 /// @def SI32_USBEP_A_stop_out_stall(basePointer) 677 #define SI32_USBEP_A_stop_out_stall(basePointer) \ 678 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_CLEAR_MASK(basePointer, SI32_USBEP_A_EPCONTROL_OSDSTL_MASK)) 679 680 681 /// @fn _SI32_USBEP_A_is_out_stall_sent(SI32_USBEP_A_Type* basePointer) 682 /// 683 /// @brief 684 /// Returns TRUE if stall transmitted, otherwise returns false;. 685 /// 686 /// @param[in] 687 /// basePointer 688 /// 689 bool 690 _SI32_USBEP_A_is_out_stall_sent(SI32_USBEP_A_Type* /*basePointer*/); 691 /// 692 /// @def SI32_USBEP_A_is_out_stall_sent(basePointer) 693 #define SI32_USBEP_A_is_out_stall_sent(basePointer) \ 694 ((bool) (basePointer->EPCONTROL.OSTSTLI)) 695 696 697 /// @fn _SI32_USBEP_A_clear_out_stall_sent(SI32_USBEP_A_Type* basePointer) 698 /// 699 /// @param[in] 700 /// basePointer 701 /// 702 void 703 _SI32_USBEP_A_clear_out_stall_sent(SI32_USBEP_A_Type* /*basePointer*/); 704 /// 705 /// @def SI32_USBEP_A_clear_out_stall_sent(basePointer) 706 #define SI32_USBEP_A_clear_out_stall_sent(basePointer) \ 707 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_CLEAR_MASK( basePointer, SI32_USBEP_A_EPCONTROL_OSTSTLI_MASK)) 708 709 710 /// @fn _SI32_USBEP_A_reset_out_data_toggle(SI32_USBEP_A_Type* basePointer) 711 /// 712 /// @param[in] 713 /// basePointer 714 /// 715 void 716 _SI32_USBEP_A_reset_out_data_toggle(SI32_USBEP_A_Type* /*basePointer*/); 717 /// 718 /// @def SI32_USBEP_A_reset_out_data_toggle(basePointer) 719 #define SI32_USBEP_A_reset_out_data_toggle(basePointer) \ 720 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_WRITE(basePointer, SI32_USBEP_A_EPCONTROL_OCLRDT_RESET_U32)) 721 722 723 /// @fn _SI32_USBEP_A_enable_out_dma_for_last_packet(SI32_USBEP_A_Type* basePointer) 724 /// 725 /// @param[in] 726 /// basePointer 727 /// 728 void 729 _SI32_USBEP_A_enable_out_dma_for_last_packet(SI32_USBEP_A_Type* /*basePointer*/); 730 /// 731 /// @def SI32_USBEP_A_enable_out_dma_for_last_packet(basePointer) 732 #define SI32_USBEP_A_enable_out_dma_for_last_packet(basePointer) \ 733 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_WRITE(basePointer, SI32_USBEP_A_EPCONTROL_ODMAMD_NO_DMA_U32)) 734 735 736 /// @fn _SI32_USBEP_A_disable_out_dma_for_last_packet(SI32_USBEP_A_Type* basePointer) 737 /// 738 /// @param[in] 739 /// basePointer 740 /// 741 void 742 _SI32_USBEP_A_disable_out_dma_for_last_packet(SI32_USBEP_A_Type* /*basePointer*/); 743 /// 744 /// @def SI32_USBEP_A_disable_out_dma_for_last_packet(basePointer) 745 #define SI32_USBEP_A_disable_out_dma_for_last_packet(basePointer) \ 746 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_CLEAR_MASK(basePointer, SI32_USBEP_A_EPCONTROL_ODMAMD_MASK)) 747 748 749 /// @fn _SI32_USBEP_A_enable_out_dma(SI32_USBEP_A_Type* basePointer) 750 /// 751 /// @param[in] 752 /// basePointer 753 /// 754 void 755 _SI32_USBEP_A_enable_out_dma(SI32_USBEP_A_Type* /*basePointer*/); 756 /// 757 /// @def SI32_USBEP_A_enable_out_dma(basePointer) 758 #define SI32_USBEP_A_enable_out_dma(basePointer) \ 759 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_WRITE(basePointer, SI32_USBEP_A_EPCONTROL_ODMAEN_ENABLED_U32)) 760 761 762 /// @fn _SI32_USBEP_A_disable_out_dma(SI32_USBEP_A_Type* basePointer) 763 /// 764 /// @param[in] 765 /// basePointer 766 /// 767 void 768 _SI32_USBEP_A_disable_out_dma(SI32_USBEP_A_Type* /*basePointer*/); 769 /// 770 /// @def SI32_USBEP_A_disable_out_dma(basePointer) 771 #define SI32_USBEP_A_disable_out_dma(basePointer) \ 772 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_CLEAR_MASK(basePointer, SI32_USBEP_A_EPCONTROL_ODMAEN_MASK)) 773 774 775 /// @fn _SI32_USBEP_A_enable_out_bulk_interrupt_mode(SI32_USBEP_A_Type* basePointer) 776 /// 777 /// @param[in] 778 /// basePointer 779 /// 780 void 781 _SI32_USBEP_A_enable_out_bulk_interrupt_mode(SI32_USBEP_A_Type* /*basePointer*/); 782 /// 783 /// @def SI32_USBEP_A_enable_out_bulk_interrupt_mode(basePointer) 784 #define SI32_USBEP_A_enable_out_bulk_interrupt_mode(basePointer) \ 785 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_CLEAR_MASK(basePointer, SI32_USBEP_A_EPCONTROL_OISOEN_MASK)) 786 787 788 /// @fn _SI32_USBEP_A_enable_out_isochronous_mode(SI32_USBEP_A_Type* basePointer) 789 /// 790 /// @param[in] 791 /// basePointer 792 /// 793 void 794 _SI32_USBEP_A_enable_out_isochronous_mode(SI32_USBEP_A_Type* /*basePointer*/); 795 /// 796 /// @def SI32_USBEP_A_enable_out_isochronous_mode(basePointer) 797 #define SI32_USBEP_A_enable_out_isochronous_mode(basePointer) \ 798 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_WRITE(basePointer, SI32_USBEP_A_EPCONTROL_OISOEN_ISO_U32)) 799 800 801 /// @fn _SI32_USBEP_A_enable_oprdy_auto_clear(SI32_USBEP_A_Type* basePointer) 802 /// 803 /// @param[in] 804 /// basePointer 805 /// 806 void 807 _SI32_USBEP_A_enable_oprdy_auto_clear(SI32_USBEP_A_Type* /*basePointer*/); 808 /// 809 /// @def SI32_USBEP_A_enable_oprdy_auto_clear(basePointer) 810 #define SI32_USBEP_A_enable_oprdy_auto_clear(basePointer) \ 811 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_WRITE(basePointer, SI32_USBEP_A_EPCONTROL_AUTOCLREN_ENABLED_U32)) 812 813 814 /// @fn _SI32_USBEP_A_disable_oprdy_auto_clear(SI32_USBEP_A_Type* basePointer) 815 /// 816 /// @param[in] 817 /// basePointer 818 /// 819 void 820 _SI32_USBEP_A_disable_oprdy_auto_clear(SI32_USBEP_A_Type* /*basePointer*/); 821 /// 822 /// @def SI32_USBEP_A_disable_oprdy_auto_clear(basePointer) 823 #define SI32_USBEP_A_disable_oprdy_auto_clear(basePointer) \ 824 (basePointer->EPCONTROL.U32 = USBEP_EPCONTROL_CLEAR_MASK(basePointer, SI32_USBEP_A_EPCONTROL_AUTOCLREN_MASK)) 825 826 827 /// @fn _SI32_USBEP_A_read_data_count(SI32_USBEP_A_Type* basePointer) 828 /// 829 /// @brief 830 /// Reads number of data bytes in the last received packet in the OUT 831 /// FIFO. 832 /// 833 /// @param[in] 834 /// basePointer 835 /// 836 uint32_t 837 _SI32_USBEP_A_read_data_count(SI32_USBEP_A_Type* /*basePointer*/); 838 /// 839 /// @def SI32_USBEP_A_read_data_count(basePointer) 840 #define SI32_USBEP_A_read_data_count(basePointer) \ 841 (basePointer->EPCOUNT.COUNT) 842 843 844 /// @fn _SI32_USBEP_A_write_fifo_u32(SI32_USBEP_A_Type* basePointer, 845 /// uint32_t dataval) 846 /// 847 /// @brief 848 /// Write a full word to the USB FIFO. 849 /// 850 /// @param[in] 851 /// basePointer 852 /// 853 /// @param[in] 854 /// dataval 855 /// Valid range is 32 bits. 856 /// 857 void 858 _SI32_USBEP_A_write_fifo_u32(SI32_USBEP_A_Type* /*basePointer*/, 859 uint32_t /*dataval*/); 860 /// 861 /// @def SI32_USBEP_A_write_fifo_u32(basePointer, dataval) 862 #define SI32_USBEP_A_write_fifo_u32(basePointer, dataval) \ 863 (basePointer->EPFIFO.U32 = dataval) 864 865 866 /// @fn _SI32_USBEP_A_write_fifo_u16(SI32_USBEP_A_Type* basePointer, 867 /// uint32_t dataval) 868 /// 869 /// @brief 870 /// Write the least-significant 2 bytes to the USB FIFO. 871 /// 872 /// @param[in] 873 /// basePointer 874 /// 875 /// @param[in] 876 /// dataval 877 /// Valid range is 32 bits. 878 /// 879 void 880 _SI32_USBEP_A_write_fifo_u16(SI32_USBEP_A_Type* /*basePointer*/, 881 uint32_t /*dataval*/); 882 /// 883 /// @def SI32_USBEP_A_write_fifo_u16(basePointer, dataval) 884 #define SI32_USBEP_A_write_fifo_u16(basePointer, dataval) \ 885 (basePointer->EPFIFO.U16 = dataval) 886 887 888 /// @fn _SI32_USBEP_A_write_fifo_u8(SI32_USBEP_A_Type* basePointer, 889 /// uint32_t dataval) 890 /// 891 /// @brief 892 /// Write the least significant byte of data to the USB FIFO. 893 /// 894 /// @param[in] 895 /// basePointer 896 /// 897 /// @param[in] 898 /// dataval 899 /// Valid range is 32 bits. 900 /// 901 void 902 _SI32_USBEP_A_write_fifo_u8(SI32_USBEP_A_Type* /*basePointer*/, 903 uint32_t /*dataval*/); 904 /// 905 /// @def SI32_USBEP_A_write_fifo_u8(basePointer, dataval) 906 #define SI32_USBEP_A_write_fifo_u8(basePointer, dataval) \ 907 (basePointer->EPFIFO.U8 = dataval) 908 909 910 /// @fn _SI32_USBEP_A_read_fifo_u32(SI32_USBEP_A_Type* basePointer) 911 /// 912 /// @brief 913 /// Reads full word from FIFO. 914 /// 915 /// @param[in] 916 /// basePointer 917 /// 918 uint32_t 919 _SI32_USBEP_A_read_fifo_u32(SI32_USBEP_A_Type* /*basePointer*/); 920 /// 921 /// @def SI32_USBEP_A_read_fifo_u32(basePointer) 922 #define SI32_USBEP_A_read_fifo_u32(basePointer) \ 923 (basePointer->EPFIFO.U32) 924 925 926 /// @fn _SI32_USBEP_A_read_fifo_u16(SI32_USBEP_A_Type* basePointer) 927 /// 928 /// @brief 929 /// Reads half word from FIFO. 930 /// 931 /// @param[in] 932 /// basePointer 933 /// 934 uint32_t 935 _SI32_USBEP_A_read_fifo_u16(SI32_USBEP_A_Type* /*basePointer*/); 936 /// 937 /// @def SI32_USBEP_A_read_fifo_u16(basePointer) 938 #define SI32_USBEP_A_read_fifo_u16(basePointer) \ 939 (basePointer->EPFIFO.U16) 940 941 942 /// @fn _SI32_USBEP_A_read_fifo_u8(SI32_USBEP_A_Type* basePointer) 943 /// 944 /// @brief 945 /// Reads byte from FIFO. 946 /// 947 /// @param[in] 948 /// basePointer 949 /// 950 uint32_t 951 _SI32_USBEP_A_read_fifo_u8(SI32_USBEP_A_Type* /*basePointer*/); 952 /// 953 /// @def SI32_USBEP_A_read_fifo_u8(basePointer) 954 #define SI32_USBEP_A_read_fifo_u8(basePointer) \ 955 (basePointer->EPFIFO.U8) 956 957 958 959 #ifdef __cplusplus 960 } 961 #endif 962 963 #endif // __SI32_USBEP_A_TYPE_H__ 964 965 //-eof-------------------------------------------------------------------------- 966
