Searched refs:SI32_PMU_A_CONTROL_RAM5REN_MASK (Results 1 – 3 of 3) sorted by relevance
353 basePointer->CONTROL_SET = SI32_PMU_A_CONTROL_RAM5REN_MASK; in _SI32_PMU_A_enable_ram_5_retention()366 basePointer->CONTROL_CLR = SI32_PMU_A_CONTROL_RAM5REN_MASK; in _SI32_PMU_A_disable_ram_5_retention()
397 (basePointer->CONTROL_SET = SI32_PMU_A_CONTROL_RAM5REN_MASK)410 (basePointer->CONTROL_CLR = SI32_PMU_A_CONTROL_RAM5REN_MASK)
193 #define SI32_PMU_A_CONTROL_RAM5REN_MASK 0x00200000 macro
