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Searched refs:SI32_PMU_A_CONTROL_RAM0REN_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_silabs-latest/si32/si32Hal/sim3l1xx/
DSI32_PMU_A_Type.c223 basePointer->CONTROL_SET = SI32_PMU_A_CONTROL_RAM0REN_MASK; in _SI32_PMU_A_enable_ram_0_retention()
236 basePointer->CONTROL_CLR = SI32_PMU_A_CONTROL_RAM0REN_MASK; in _SI32_PMU_A_disable_ram_0_retention()
DSI32_PMU_A_Type.h267 (basePointer->CONTROL_SET = SI32_PMU_A_CONTROL_RAM0REN_MASK)
280 (basePointer->CONTROL_CLR = SI32_PMU_A_CONTROL_RAM0REN_MASK)
DSI32_SIM3L1XX_PMU_A_Registers.h128 #define SI32_PMU_A_CONTROL_RAM0REN_MASK 0x00010000 macro