Searched refs:SI32_PLL_A_CONTROL_REFSEL_MASK (Results 1 – 3 of 3) sorted by relevance
347 basePointer->CONTROL_CLR = SI32_PLL_A_CONTROL_REFSEL_MASK; in _SI32_PLL_A_select_reference_clock_source_rtc0osc()360 basePointer->CONTROL_CLR = SI32_PLL_A_CONTROL_REFSEL_MASK; in _SI32_PLL_A_select_reference_clock_source_lp0oscdiv()374 basePointer->CONTROL_CLR = SI32_PLL_A_CONTROL_REFSEL_MASK; in _SI32_PLL_A_select_reference_clock_source_ext0osc()388 basePointer->CONTROL_CLR = SI32_PLL_A_CONTROL_REFSEL_MASK; in _SI32_PLL_A_select_reference_clock_source_usb0osc()402 basePointer->CONTROL_CLR = SI32_PLL_A_CONTROL_REFSEL_MASK; in _SI32_PLL_A_select_reference_clock_source_lp0osc()
422 (basePointer->CONTROL_CLR = SI32_PLL_A_CONTROL_REFSEL_MASK)435 basePointer->CONTROL_CLR = SI32_PLL_A_CONTROL_REFSEL_MASK;\450 basePointer->CONTROL_CLR = SI32_PLL_A_CONTROL_REFSEL_MASK;\465 basePointer->CONTROL_CLR = SI32_PLL_A_CONTROL_REFSEL_MASK;\480 basePointer->CONTROL_CLR = SI32_PLL_A_CONTROL_REFSEL_MASK;\
166 #define SI32_PLL_A_CONTROL_REFSEL_MASK 0x00070000 macro