Searched refs:SI32_ENCDEC_A_CONTROL_IORDER_MASK (Results 1 – 3 of 3) sorted by relevance
427 basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_IORDER_MASK; in _SI32_ENCDEC_A_select_input_order_no_change()440 basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_IORDER_MASK; in _SI32_ENCDEC_A_select_input_order_flip_half_word()454 basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_IORDER_MASK; in _SI32_ENCDEC_A_select_input_order_flip_word()468 basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_IORDER_MASK; in _SI32_ENCDEC_A_select_input_order_flip_lower_three_bytes()
455 (basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_IORDER_MASK)468 basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_IORDER_MASK;\483 basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_IORDER_MASK;\498 basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_IORDER_MASK;\
205 #define SI32_ENCDEC_A_CONTROL_IORDER_MASK 0x0000C000 macro
