Searched refs:SI32_ENCDEC_A_CONTROL_ERRIEN_MASK (Results 1 – 3 of 3) sorted by relevance
95 #define SI32_ENCDEC_A_CONTROL_ERRIEN_MASK 0x00000004 macro
177 basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_ERRIEN_MASK; in _SI32_ENCDEC_A_disable_error_interrupt()
202 (basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_ERRIEN_MASK)