1 //------------------------------------------------------------------------------ 2 // Copyright 2012 (c) Silicon Laboratories Inc. 3 // 4 // SPDX-License-Identifier: Zlib 5 // 6 // This siHAL software is provided 'as-is', without any express or implied 7 // warranty. In no event will the authors be held liable for any damages 8 // arising from the use of this software. 9 // 10 // Permission is granted to anyone to use this software for any purpose, 11 // including commercial applications, and to alter it and redistribute it 12 // freely, subject to the following restrictions: 13 // 14 // 1. The origin of this software must not be misrepresented; you must not 15 // claim that you wrote the original software. If you use this software 16 // in a product, an acknowledgment in the product documentation would be 17 // appreciated but is not required. 18 // 2. Altered source versions must be plainly marked as such, and must not be 19 // misrepresented as being the original software. 20 // 3. This notice may not be removed or altered from any source distribution. 21 //------------------------------------------------------------------------------ 22 // 23 // This file applies to the SIM3L1XX_CLKCTRL_A module 24 // 25 // Version: 1 26 27 #ifndef __SI32_CLKCTRL_A_SUPPORT_H__ 28 #define __SI32_CLKCTRL_A_SUPPORT_H__ 29 30 #include <stdint.h> 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 //----------------------------------------------------------------------------- 37 // Defines for APBCLKG0 and APBCLKG1 module masks 38 39 #define SI32_CLKCTRL_A_APBCLKG0_FLASHCTRL0 0x00000001 40 #define SI32_CLKCTRL_A_APBCLKG0_PB0 0x00000002 41 #define SI32_CLKCTRL_A_APBCLKG0_USART0 0x00000004 42 #define SI32_CLKCTRL_A_APBCLKG0_UART0 0x00000008 43 #define SI32_CLKCTRL_A_APBCLKG0_SPI0 0x00000010 44 #define SI32_CLKCTRL_A_APBCLKG0_SPI1 0x00000020 45 #define SI32_CLKCTRL_A_APBCLKG0_I2C0 0x00000040 46 #define SI32_CLKCTRL_A_APBCLKG0_EPCA0 0x00000080 47 #define SI32_CLKCTRL_A_APBCLKG0_TIMER0 0x00000100 48 #define SI32_CLKCTRL_A_APBCLKG0_TIMER1 0x00000200 49 #define SI32_CLKCTRL_A_APBCLKG0_TIMER2 0x00000400 50 #define SI32_CLKCTRL_A_APBCLKG0_SARADC0 0x00000800 51 #define SI32_CLKCTRL_A_APBCLKG0_CMP0 0x00001000 52 #define SI32_CLKCTRL_A_APBCLKG0_CMP1 0x00002000 53 #define SI32_CLKCTRL_A_APBCLKG0_AES0 0x00004000 54 #define SI32_CLKCTRL_A_APBCLKG0_CRC0 0x00008000 55 #define SI32_CLKCTRL_A_APBCLKG0_IDAC0 0x00010000 56 #define SI32_CLKCTRL_A_APBCLKG0_LPTIMER0 0x00020000 57 #define SI32_CLKCTRL_A_APBCLKG0_ACCTR0 0x00040000 58 #define SI32_CLKCTRL_A_APBCLKG0_DTM0 0x00080000 59 #define SI32_CLKCTRL_A_APBCLKG0_DTM1 0x00100000 60 #define SI32_CLKCTRL_A_APBCLKG0_DTM2 0x00200000 61 #define SI32_CLKCTRL_A_APBCLKG0_LCD0 0x00400000 62 #define SI32_CLKCTRL_A_APBCLKG0_DCDC0 0x00800000 63 #define SI32_CLKCTRL_A_APBCLKG0_ENCDEC0 0x01000000 64 #define SI32_CLKCTRL_A_APBCLKG0_PLL0 0x02000000 65 66 #define SI32_CLKCTRL_A_APBCLKG1_MISC0 0x00000001 67 #define SI32_CLKCTRL_A_APBCLKG1_MISC1 0x00000002 68 69 #ifdef __cplusplus 70 } 71 #endif 72 73 #endif // __SI32_CLKCTRL_A_SUPPORT_H__ 74 75 //-eof-------------------------------------------------------------------------- 76
