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Searched refs:SI32_CLKCTRL_A_AHBCLKG_RAMCEN_ENABLED_VALUE (Results 1 – 3 of 3) sorted by relevance

/hal_silabs-latest/si32/si32Hal/sim3u1xx/
DSI32_SIM3U1XX_CLKCTRL_A_Registers.h194 #define SI32_CLKCTRL_A_AHBCLKG_RAMCEN_ENABLED_VALUE 1 macro
196 (SI32_CLKCTRL_A_AHBCLKG_RAMCEN_ENABLED_VALUE << SI32_CLKCTRL_A_AHBCLKG_RAMCEN_SHIFT)
/hal_silabs-latest/si32/si32Hal/sim3c1xx/
DSI32_SIM3C1XX_CLKCTRL_A_Registers.h188 #define SI32_CLKCTRL_A_AHBCLKG_RAMCEN_ENABLED_VALUE 1 macro
190 (SI32_CLKCTRL_A_AHBCLKG_RAMCEN_ENABLED_VALUE << SI32_CLKCTRL_A_AHBCLKG_RAMCEN_SHIFT)
/hal_silabs-latest/si32/si32Hal/sim3l1xx/
DSI32_SIM3L1XX_CLKCTRL_A_Registers.h221 #define SI32_CLKCTRL_A_AHBCLKG_RAMCEN_ENABLED_VALUE 1 macro
223 (SI32_CLKCTRL_A_AHBCLKG_RAMCEN_ENABLED_VALUE << SI32_CLKCTRL_A_AHBCLKG_RAMCEN_SHIFT)