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Searched refs:RTCC_IFC_CC0_DEFAULT (Results 1 – 9 of 9) sorted by relevance

/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_rtcc.h385 #define RTCC_IFC_CC0_DEFAULT (_RTCC_IFC_CC0_DEFAULT << 1) /**< Shifted mode D… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_rtcc.h385 #define RTCC_IFC_CC0_DEFAULT (_RTCC_IFC_CC0_DEFAULT << 1) /**< Shifted mode D… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_rtcc.h385 #define RTCC_IFC_CC0_DEFAULT (_RTCC_IFC_CC0_DEFAULT << 1) /**< Shifted mode D… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_rtcc.h385 #define RTCC_IFC_CC0_DEFAULT (_RTCC_IFC_CC0_DEFAULT << 1) /**< Shifted mode D… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_rtcc.h385 #define RTCC_IFC_CC0_DEFAULT (_RTCC_IFC_CC0_DEFAULT << 1) /**< Shifted mode D… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_rtcc.h385 #define RTCC_IFC_CC0_DEFAULT (_RTCC_IFC_CC0_DEFAULT << 1) /**< Shifted mode D… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_rtcc.h385 #define RTCC_IFC_CC0_DEFAULT (_RTCC_IFC_CC0_DEFAULT << 1) /**< Shifted mode D… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_rtcc.h390 #define RTCC_IFC_CC0_DEFAULT (_RTCC_IFC_CC0_DEFAULT << 1) /**< Shifted mode D… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_rtcc.h390 #define RTCC_IFC_CC0_DEFAULT (_RTCC_IFC_CC0_DEFAULT << 1) /**< Shifted mode D… macro