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Searched refs:RTCC_IEN_CC0 (Results 1 – 14 of 14) sorted by relevance

/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG29/Include/
Defr32mg29_rtcc.h277 #define RTCC_IEN_CC0 (0x1UL << 4) /**< CC Cha… macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_rtcc.h277 #define RTCC_IEN_CC0 (0x1UL << 2) /**< CC Cha… macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG29/Include/
Defr32bg29_rtcc.h277 #define RTCC_IEN_CC0 (0x1UL << 4) /**< CC Cha… macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_rtcc.h277 #define RTCC_IEN_CC0 (0x1UL << 4) /**< CC Cha… macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_rtcc.h277 #define RTCC_IEN_CC0 (0x1UL << 4) /**< CC Cha… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_rtcc.h440 #define RTCC_IEN_CC0 (0x1UL << 1) /**< CC0 Interrupt … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_rtcc.h440 #define RTCC_IEN_CC0 (0x1UL << 1) /**< CC0 Interrupt … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_rtcc.h440 #define RTCC_IEN_CC0 (0x1UL << 1) /**< CC0 Interrupt … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_rtcc.h440 #define RTCC_IEN_CC0 (0x1UL << 1) /**< CC0 Interrupt … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_rtcc.h440 #define RTCC_IEN_CC0 (0x1UL << 1) /**< CC0 Interrupt … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_rtcc.h440 #define RTCC_IEN_CC0 (0x1UL << 1) /**< CC0 Interrupt … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_rtcc.h440 #define RTCC_IEN_CC0 (0x1UL << 1) /**< CC0 Interrupt … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_rtcc.h445 #define RTCC_IEN_CC0 (0x1UL << 1) /**< CC0 Interrupt … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_rtcc.h445 #define RTCC_IEN_CC0 (0x1UL << 1) /**< CC0 Interrupt … macro