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Searched refs:RAM2_MEM_END (Results 1 – 25 of 185) sorted by relevance

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/hal_silabs-latest/gecko/emlib/src/
Dem_emu.c1732 #if defined(RAM2_MEM_END) in EMU_RamPowerDown()
1734 if (end > RAM2_MEM_END) { in EMU_RamPowerDown()
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_emu.c1787 #if defined(RAM2_MEM_END) in EMU_RamPowerDown()
1789 if (end > RAM2_MEM_END) { in EMU_RamPowerDown()
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b810f1024gl112.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b810f1024gl120.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b830f512gm64.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b830f512il112.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b830f512il120.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b830f512iq100.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b830f512iq64.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b810f1024gm64.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b810f1024gq100.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b810f1024gq64.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b810f1024il112.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b410f1024im64.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b410f1024iq100.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b410f1024iq64.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b430f512gl120.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b430f512gm64.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b430f512gq100.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b430f512gq64.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b430f512il112.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b430f512il120.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b430f512im64.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b430f512iq100.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro
Defm32gg12b430f512iq64.h184 #define RAM2_MEM_END (0x2002FFFFUL) /**< RAM2 end address */ macro

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