| /hal_silabs-latest/gecko/emlib/src/ |
| D | em_emu.c | 1620 EMU->RAM0CTRL = blocks & _EMU_RAM0CTRL_MASK; in EMU_MemPwrDown()
1710 EMU->RAM0CTRL = EMU->RAM0CTRL | mask; in EMU_RamPowerDown()
1756 EMU->RAM0CTRL = 0x0UL; in EMU_RamPowerUp()
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| /hal_silabs-latest/simplicity_sdk/platform/emlib/src/ |
| D | em_emu.c | 1675 EMU->RAM0CTRL = blocks & _EMU_RAM0CTRL_MASK; in EMU_MemPwrDown()
1765 EMU->RAM0CTRL = EMU->RAM0CTRL | mask; in EMU_RamPowerDown()
1811 EMU->RAM0CTRL = 0x0UL; in EMU_RamPowerUp()
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/ |
| D | efr32fg1p_emu.h | 51 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/ |
| D | efm32pg1b_emu.h | 51 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/ |
| D | efr32mg12p_emu.h | 51 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/ |
| D | efr32fg13p_emu.h | 51 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/ |
| D | efm32jg12b_emu.h | 51 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/ |
| D | efr32bg13p_emu.h | 51 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/ |
| D | efm32pg12b_emu.h | 51 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/ |
| D | efm32gg12b_emu.h | 51 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| D | efm32gg12b390f1024gl112.h | 395 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| D | efm32gg12b390f512gl112.h | 395 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| D | efm32gg12b530f512il120.h | 441 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| D | efm32gg12b530f512im64.h | 441 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| D | efm32gg12b530f512iq100.h | 441 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| D | efm32gg12b530f512iq64.h | 441 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| D | efm32gg12b530f512gq100.h | 441 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| D | efm32gg12b530f512gq64.h | 441 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| D | efm32gg12b530f512il112.h | 441 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| D | efm32gg12b110f1024gm64.h | 436 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| D | efm32gg12b110f1024gq64.h | 436 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| D | efm32gg12b530f512gl112.h | 441 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| D | efm32gg12b530f512gl120.h | 441 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| D | efm32gg12b530f512gm64.h | 441 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/ |
| D | efm32gg11b_emu.h | 51 __IOM uint32_t RAM0CTRL; /**< Memory Control Register */ member
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