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Searched refs:PRS_UART1_RXDATAV (Results 1 – 25 of 85) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_prs_signals.h88 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg280f128.h527 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg280f256.h527 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg280f64.h527 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg290f128.h527 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg290f256.h527 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg290f64.h527 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg295f128.h527 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg295f256.h527 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg295f64.h527 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg880f128.h532 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg880f256.h532 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg895f128.h532 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg880f64.h532 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg890f128.h532 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg890f256.h532 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg890f64.h532 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg895f256.h532 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
Defm32wg895f64.h532 #define PRS_UART1_RXDATAV ((42 << 16) + 2) /**< PRS USART 0 RX Data Valid */ macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_prs_signals.h174 #define PRS_UART1_RXDATAV ((55 << 8) + 2) /**< PRS */ macro
Defm32gg12b390f1024gl112.h959 #define PRS_UART1_RXDATAV ((55 << 8) + 2) /**< PRS */ macro
Defm32gg12b390f512gl112.h959 #define PRS_UART1_RXDATAV ((55 << 8) + 2) /**< PRS */ macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_prs_signals.h188 #define PRS_UART1_RXDATAV ((55 << 8) + 2) /**< PRS */ macro
/hal_silabs-latest/simplicity_sdk/platform/emlib/inc/
Dem_prs.h513 prsSignalUART1_RXDATAV = PRS_UART1_RXDATAV, /**< UART1 RX data available Signal. */
/hal_silabs-latest/gecko/emlib/inc/
Dem_prs.h507 prsSignalUART1_RXDATAV = PRS_UART1_RXDATAV, /**< UART1 RX data available Signal. */

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