Searched refs:PMU_SPI_DIRECT_ACCESS (Results 1 – 3 of 3) sorted by relevance
191 value = PMU_SPI_DIRECT_ACCESS(reg_addr); in update_ipmu_data()200 PMU_SPI_DIRECT_ACCESS(reg_addr) = value; in update_ipmu_data()411 PMU_SPI_DIRECT_ACCESS(PMU_PFM_REG_OFFSET); in init_ipmu_calib_data()418 PMU_SPI_DIRECT_ACCESS(PMU_PFM_REG_OFFSET); in init_ipmu_calib_data()450 PMU_SPI_DIRECT_ACCESS(PMU_PFM_REG_OFFSET); in program_ipmu_data()645 …PMU_SPI_DIRECT_ACCESS(PMU_LDO_REG_OFFSET) &= ~LDOSOC_DEFAULT_MODE_EN; //LDO-SoC o/p Volt is config… in ipmu_init()646 …PMU_SPI_DIRECT_ACCESS(PMU_PWRTRAIN_REG_OFFSET) |= BYPASS_LDORF_CTRL; //LDO-FLASH is configurable … in ipmu_init()649 PMU_SPI_DIRECT_ACCESS(0x1DA) = 0x2818; in ipmu_init()650 PMU_SPI_DIRECT_ACCESS(0x1DD) = 0x26249A; in ipmu_init()651 PMU_SPI_DIRECT_ACCESS(0x1D0) = 0x132241; in ipmu_init()[all …]
429 (void)PMU_SPI_DIRECT_ACCESS(PMU_PFM_REG_OFFSET); in RSI_IPMU_InitCalibData()434 (void)PMU_SPI_DIRECT_ACCESS(PMU_PFM_REG_OFFSET); in RSI_IPMU_InitCalibData()486 bypass_curr_ctrl_data = PMU_SPI_DIRECT_ACCESS(PMU_1P3_CTRL_REG_OFFSET); in RSI_Configure_DCDC_LowerVoltage()488 bypass_curr_ctrl_data = PMU_SPI_DIRECT_ACCESS(BYPASS_CURR_CTRL_REG_OFFSET); in RSI_Configure_DCDC_LowerVoltage()490 …PMU_SPI_DIRECT_ACCESS(BYPASS_CURR_CTRL_REG_OFFSET) = (bypass_curr_ctrl_data | (pmu_1p2_ctrl_word <… in RSI_Configure_DCDC_LowerVoltage()
118 #define PMU_SPI_DIRECT_ACCESS(_x) *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0x8000 + ((_x) << 2)) macro
