Searched refs:PMU_DIRECT_ACCESS (Results 1 – 3 of 3) sorted by relevance
189 value = PMU_DIRECT_ACCESS(reg_addr); in update_ipmu_data()198 PMU_DIRECT_ACCESS(reg_addr) = value; in update_ipmu_data()487 PMU_DIRECT_ACCESS(iPMU_SPARE_REG2_OFFSET) &= ~(wurx_lvl_shift_en); in shut_down_non_wireless_mode_pds()488 PMU_DIRECT_ACCESS(iPMU_SPARE_REG2_OFFSET) &= ~(wurx_pg_en_1); in shut_down_non_wireless_mode_pds()490 PMU_DIRECT_ACCESS(ULPCLKS_REF_CLK_REG_OFFSET) &= ~pass_clk_40m_buffer_enable; in shut_down_non_wireless_mode_pds()493 PMU_DIRECT_ACCESS(0x125) |= (BIT(2)); //! Added by Nagaraj in shut_down_non_wireless_mode_pds()494 PMU_DIRECT_ACCESS(0x127) &= ~((BIT(3)) | BIT(4)); //! Added by Nagaraj in shut_down_non_wireless_mode_pds()500 reg_val = (PMU_DIRECT_ACCESS(POWERGATE_REG_READ_OFFSET) >> 5); in shut_down_non_wireless_mode_pds()502 PMU_DIRECT_ACCESS(POWERGATE_REG_WRITE_OFFSET) = reg_val; in shut_down_non_wireless_mode_pds()505 PMU_DIRECT_ACCESS(ULPCLKS_MRC_CLK_REG_OFFSET) &= ~rc_mhz_en; in shut_down_non_wireless_mode_pds()[all …]
283 PMU_DIRECT_ACCESS(BG_SLEEP_TIMER_REG_OFFSET) |= BIT(19); //bgs_active_timer_sel in SystemInit()
120 #define PMU_DIRECT_ACCESS(_x) *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xA000 + ((_x) << 2)) macro
