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Searched refs:PLL_INTF_CLK_SWALLOW_SEL (Results 1 – 3 of 3) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/
Dclock_update.c541 swallow_val = (M4CLK->CLK_CONFIG_REG1_b.PLL_INTF_CLK_SWALLOW_SEL); in RSI_CLK_GetBaseClock()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_pll.c1820 pCLK->CLK_CONFIG_REG1_b.PLL_INTF_CLK_SWALLOW_SEL = 1; in clk_ethernet_clk_config()
1822 pCLK->CLK_CONFIG_REG1_b.PLL_INTF_CLK_SWALLOW_SEL = 0; in clk_ethernet_clk_config()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/core/chip/inc/
Dsi91x_device.h10470 __IOM unsigned int PLL_INTF_CLK_SWALLOW_SEL : 1; /*!< [23..23] Clock select for clock member