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Searched refs:PLL_500_PD (Results 1 – 2 of 2) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_pll.c442 SPI_MEM_MAP_PLL(SOC_PLL_500_CTRL_REG1) |= PLL_500_PD; in clk_soc_pll_pd_enable()
445 SPI_MEM_MAP_PLL(SOC_PLL_500_CTRL_REG1) &= (uint16_t)(~(PLL_500_PD)); in clk_soc_pll_pd_enable()
461 socreg1 |= PLL_500_PD; in clk_soc_pll_turn_off()
479 socreg1 &= (uint16_t)(~(PLL_500_PD)); in clk_soc_pll_turn_on()
536 SPI_MEM_MAP_PLL(I2S_PLL_CTRL_REG1) |= PLL_500_PD; in clk_i2s_pll_pd_enable()
539 SPI_MEM_MAP_PLL(I2S_PLL_CTRL_REG1) &= (uint16_t)(~(PLL_500_PD)); in clk_i2s_pll_pd_enable()
555 i2sreg1 |= PLL_500_PD; in clk_i2s_pll_turn_off()
571 i2sreg1 &= (uint16_t)(~(PLL_500_PD)); in clk_i2s_pll_turn_on()
659 i2sreg1 &= (uint16_t)(~PLL_500_PD); in clk_set_i2s_pll_freq()
710 i2sreg1 &= (uint16_t)~PLL_500_PD; in clk_i2s_pll_set_freq_div()
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/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_pll.h257 #define PLL_500_PD BIT(4) /* Enables PLL_500_PD */ macro