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Searched refs:MODE (Results 1 – 25 of 33) sorted by relevance

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/hal_silabs-latest/si32/si32Hal/SI32_Modules/
DSI32_EPCA_A_Type.h106 basePointer->MODE.U32 = mode;\
136 (basePointer->MODE.U32 = mode)
152 (basePointer->MODE.U32)
176 (basePointer->MODE.CLKDIV = divisor)
189 (basePointer->MODE.CLKSEL = SI32_EPCA_A_MODE_CLKSEL_APB_VALUE)
202 (basePointer->MODE.CLKSEL = SI32_EPCA_A_MODE_CLKSEL_TIMER0_VALUE)
215 (basePointer->MODE.CLKSEL = SI32_EPCA_A_MODE_CLKSEL_HL_ECI_VALUE)
228 (basePointer->MODE.CLKSEL = SI32_EPCA_A_MODE_CLKSEL_EXTOSCN_VALUE)
241 (basePointer->MODE.CLKSEL = SI32_EPCA_A_MODE_CLKSEL_ECI_VALUE)
257 (basePointer->MODE.HDOSEL = SI32_EPCA_A_MODE_HDOSEL_NO_DIFF_VALUE)
[all …]
DSI32_EPCA_A_Type.c53 basePointer->MODE.U32 = mode; in _SI32_EPCA_A_initialize()
75 basePointer->MODE.U32 = mode; in _SI32_EPCA_A_write_mode()
89 return basePointer->MODE.U32; in _SI32_EPCA_A_read_mode()
107 basePointer->MODE.CLKDIV = divisor; in _SI32_EPCA_A_select_input_clock_divisor()
120 basePointer->MODE.CLKSEL = SI32_EPCA_A_MODE_CLKSEL_APB_VALUE; in _SI32_EPCA_A_select_input_clock_apb()
133 basePointer->MODE.CLKSEL = SI32_EPCA_A_MODE_CLKSEL_TIMER0_VALUE; in _SI32_EPCA_A_select_input_clock_timer0_overflow()
146 basePointer->MODE.CLKSEL = SI32_EPCA_A_MODE_CLKSEL_HL_ECI_VALUE; in _SI32_EPCA_A_select_input_clock_eci_high_to_low()
159 basePointer->MODE.CLKSEL = SI32_EPCA_A_MODE_CLKSEL_EXTOSCN_VALUE; in _SI32_EPCA_A_select_input_clock_external_oscillator()
172 basePointer->MODE.CLKSEL = SI32_EPCA_A_MODE_CLKSEL_ECI_VALUE; in _SI32_EPCA_A_select_input_clock_eci()
186 basePointer->MODE.HDOSEL = SI32_EPCA_A_MODE_HDOSEL_NO_DIFF_VALUE; in _SI32_EPCA_A_select_high_drive_port_0_differential()
[all …]
DSI32_EPCACH_A_Type.c50 basePointer->MODE.U32 = mode; in _SI32_EPCACH_A_initialize()
68 basePointer->MODE.U32 = mode; in _SI32_EPCACH_A_write_mode()
82 return basePointer->MODE.U32; in _SI32_EPCACH_A_read_mode()
96 basePointer->MODE.COSEL = SI32_EPCACH_A_MODE_COSEL_TOGGLE_OUTPUT_VALUE; in _SI32_EPCACH_A_select_output_mode_toggle()
110 basePointer->MODE.COSEL = SI32_EPCACH_A_MODE_COSEL_SET_OUTPUT_VALUE; in _SI32_EPCACH_A_select_output_mode_set()
124 basePointer->MODE.COSEL = SI32_EPCACH_A_MODE_COSEL_CLEAR_OUTPUT_VALUE; in _SI32_EPCACH_A_select_output_mode_clear()
138 basePointer->MODE.COSEL = SI32_EPCACH_A_MODE_COSEL_NO_CHANGE_VALUE; in _SI32_EPCACH_A_select_output_mode_none()
156 basePointer->MODE.PWMMD = nbits; in _SI32_EPCACH_A_set_width_for_n_bit_edge_aligned_pwm_mode()
169 basePointer->MODE.DIFGEN = SI32_EPCACH_A_MODE_DIFGEN_ENABLED_VALUE; in _SI32_EPCACH_A_enable_differential_signal_generator()
182 basePointer->MODE.DIFGEN = SI32_EPCACH_A_MODE_DIFGEN_DISABLED_VALUE; in _SI32_EPCACH_A_disable_differential_signal_generator()
[all …]
DSI32_PCACH_A_Type.c47 basePointer->MODE.U32 = mode; in _SI32_PCACH_A_initialize()
65 basePointer->MODE.U32 = mode; in _SI32_PCACH_A_write_mode()
79 return basePointer->MODE.U32; in _SI32_PCACH_A_read_mode()
93 basePointer->MODE.COSEL = SI32_PCACH_A_MODE_COSEL_TOGGLE_OUTPUT_VALUE; in _SI32_PCACH_A_select_output_mode_toggle()
107 basePointer->MODE.COSEL = SI32_PCACH_A_MODE_COSEL_SET_OUTPUT_VALUE; in _SI32_PCACH_A_select_output_mode_set()
121 basePointer->MODE.COSEL = SI32_PCACH_A_MODE_COSEL_CLEAR_OUTPUT_VALUE; in _SI32_PCACH_A_select_output_mode_clear()
135 basePointer->MODE.COSEL = SI32_PCACH_A_MODE_COSEL_NO_CHANGE_VALUE; in _SI32_PCACH_A_select_output_mode_none()
153 basePointer->MODE.PWMMD = nbits; in _SI32_PCACH_A_set_width_for_n_bit_edge_aligned_pwm_mode()
167 basePointer->MODE.CMD = SI32_PCACH_A_MODE_CMD_EDGE_PWM_VALUE; in _SI32_PCACH_A_select_operating_mode_edge_aligned_pwm()
181 basePointer->MODE.CMD = SI32_PCACH_A_MODE_CMD_CENTER_ALIGNED_PWM_VALUE; in _SI32_PCACH_A_select_operating_mode_center_aligned_pwm()
[all …]
DSI32_EPCACH_A_Type.h81 basePointer->MODE.U32 = mode;\
107 (basePointer->MODE.U32 = mode)
123 (basePointer->MODE.U32)
139 (basePointer->MODE.COSEL = SI32_EPCACH_A_MODE_COSEL_TOGGLE_OUTPUT_VALUE)
155 (basePointer->MODE.COSEL = SI32_EPCACH_A_MODE_COSEL_SET_OUTPUT_VALUE)
171 (basePointer->MODE.COSEL = SI32_EPCACH_A_MODE_COSEL_CLEAR_OUTPUT_VALUE)
187 (basePointer->MODE.COSEL = SI32_EPCACH_A_MODE_COSEL_NO_CHANGE_VALUE)
211 (basePointer->MODE.PWMMD = nbits)
224 (basePointer->MODE.DIFGEN = SI32_EPCACH_A_MODE_DIFGEN_ENABLED_VALUE)
237 (basePointer->MODE.DIFGEN = SI32_EPCACH_A_MODE_DIFGEN_DISABLED_VALUE)
[all …]
DSI32_PCACH_A_Type.h80 basePointer->MODE.U32 = mode;\
106 (basePointer->MODE.U32 = mode)
122 (basePointer->MODE.U32)
138 (basePointer->MODE.COSEL = SI32_PCACH_A_MODE_COSEL_TOGGLE_OUTPUT_VALUE)
154 (basePointer->MODE.COSEL = SI32_PCACH_A_MODE_COSEL_SET_OUTPUT_VALUE)
170 (basePointer->MODE.COSEL = SI32_PCACH_A_MODE_COSEL_CLEAR_OUTPUT_VALUE)
186 (basePointer->MODE.COSEL = SI32_PCACH_A_MODE_COSEL_NO_CHANGE_VALUE)
210 (basePointer->MODE.PWMMD = nbits)
226 (basePointer->MODE.CMD = SI32_PCACH_A_MODE_CMD_EDGE_PWM_VALUE)
242 (basePointer->MODE.CMD = SI32_PCACH_A_MODE_CMD_CENTER_ALIGNED_PWM_VALUE)
[all …]
DSI32_DMADESC_A_Support.h48 #define SI32_DMADESC_A_CONFIG_MOVE(SIZE, MODE) \ argument
51 | SI32_DMADESC_A_CONFIG_TMD_## MODE ##_U32 )
53 #define SI32_DMADESC_A_CONFIG_RX(SIZE, MODE) \ argument
56 | SI32_DMADESC_A_CONFIG_TMD_## MODE ##_U32 )
58 #define SI32_DMADESC_A_CONFIG_TX(SIZE, MODE) \ argument
61 | SI32_DMADESC_A_CONFIG_TMD_## MODE ##_U32 )
63 #define SI32_DMADESC_A_CONFIG_PIPE(SIZE, MODE) \ argument
66 | SI32_DMADESC_A_CONFIG_TMD_## MODE ##_U32 )
DSI32_PCA_A_Type.h86 basePointer->MODE.U32 = mode;\
113 (basePointer->MODE.U32 = mode)
129 (basePointer->MODE.U32)
153 (basePointer->MODE.CLKDIV = divisor)
166 (basePointer->MODE.CLKSEL = SI32_PCA_A_MODE_CLKSEL_APB_VALUE)
179 (basePointer->MODE.CLKSEL = SI32_PCA_A_MODE_CLKSEL_TIMER0_VALUE)
192 (basePointer->MODE.CLKSEL = SI32_PCA_A_MODE_CLKSEL_HL_ECI_VALUE)
205 (basePointer->MODE.CLKSEL = SI32_PCA_A_MODE_CLKSEL_EXTOSCN_VALUE)
218 (basePointer->MODE.CLKSEL = SI32_PCA_A_MODE_CLKSEL_ECI_VALUE)
DSI32_PCA_A_Type.c48 basePointer->MODE.U32 = mode; in _SI32_PCA_A_initialize()
67 basePointer->MODE.U32 = mode; in _SI32_PCA_A_write_mode()
81 return basePointer->MODE.U32; in _SI32_PCA_A_read_mode()
99 basePointer->MODE.CLKDIV = divisor; in _SI32_PCA_A_select_input_clock_divisor()
112 basePointer->MODE.CLKSEL = SI32_PCA_A_MODE_CLKSEL_APB_VALUE; in _SI32_PCA_A_select_input_clock_apb()
125 basePointer->MODE.CLKSEL = SI32_PCA_A_MODE_CLKSEL_TIMER0_VALUE; in _SI32_PCA_A_select_input_clock_timer0_overflow()
138 basePointer->MODE.CLKSEL = SI32_PCA_A_MODE_CLKSEL_HL_ECI_VALUE; in _SI32_PCA_A_select_input_clock_eci_high_to_low()
151 basePointer->MODE.CLKSEL = SI32_PCA_A_MODE_CLKSEL_EXTOSCN_VALUE; in _SI32_PCA_A_select_input_clock_external_oscillator()
164 basePointer->MODE.CLKSEL = SI32_PCA_A_MODE_CLKSEL_ECI_VALUE; in _SI32_PCA_A_select_input_clock_eci()
DSI32_CMP_A_Type.c46 basePointer->MODE.U32 = mode; in _SI32_CMP_A_initialize()
181 basePointer->MODE.U32 = mode; in _SI32_CMP_A_write_mode()
195 return basePointer->MODE.U32; in _SI32_CMP_A_read_mode()
310 return (bool)(basePointer->MODE.FIEN); in _SI32_CMP_A_is_falling_edge_interrupt_enabled()
349 return (bool)(basePointer->MODE.RIEN); in _SI32_CMP_A_is_rising_edge_interrupt_enabled()
382 return basePointer->MODE.DACLVL; in _SI32_CMP_A_read_dac_level_setting()
DSI32_CMP_A_Type.h72 basePointer->MODE.U32 = mode;\
224 (basePointer->MODE.U32 = mode)
240 (basePointer->MODE.U32)
375 ((bool)(basePointer->MODE.FIEN))
414 ((bool)(basePointer->MODE.RIEN))
456 (basePointer->MODE.DACLVL)
DSI32_CAPSENSE_A_Type.c53 basePointer->MODE.U32 = mode; in _SI32_CAPSENSE_A_initialize()
560 basePointer->MODE.U32 = mode; in _SI32_CAPSENSE_A_write_mode()
573 return basePointer->MODE.U32; in _SI32_CAPSENSE_A_read_mode()
DSI32_CAPSENSE_A_Type.h90 basePointer->MODE.U32 = mode;\
664 (basePointer->MODE.U32 = mode)
680 (basePointer->MODE.U32)
DSI32_UART_B_Type.c60 basePointer->MODE.U32 = mode; in _SI32_UART_B_initialize()
476 basePointer->MODE.U32 = mode; in _SI32_UART_B_write_mode()
490 return basePointer->MODE.U32; in _SI32_UART_B_read_mode()
581 return (bool)(basePointer->MODE.CLKBUSY); in _SI32_UART_B_is_clock_switch_busy()
DSI32_UART_A_Type.c57 basePointer->MODE.U32 = mode; in _SI32_UART_A_initialize()
524 basePointer->MODE.U32 = mode; in _SI32_UART_A_write_mode()
538 return basePointer->MODE.U32; in _SI32_UART_A_read_mode()
DSI32_USART_B_Type.c58 basePointer->MODE.U32 = mode; in _SI32_USART_B_initialize()
577 basePointer->MODE.U32 = mode; in _SI32_USART_B_write_mode()
591 return basePointer->MODE.U32; in _SI32_USART_B_read_mode()
DSI32_UART_B_Type.h578 (basePointer->MODE.U32 = mode)
594 (basePointer->MODE.U32)
686 ((bool)(basePointer->MODE.CLKBUSY))
DSI32_USART_A_Type.c57 basePointer->MODE.U32 = mode; in _SI32_USART_A_initialize()
576 basePointer->MODE.U32 = mode; in _SI32_USART_A_write_mode()
590 return basePointer->MODE.U32; in _SI32_USART_A_read_mode()
DSI32_PCACH_A_Registers.h238 struct SI32_PCACH_A_MODE_Struct MODE ; // Base Address + 0x0 member
DSI32_PCA_A_Registers.h273 struct SI32_PCA_A_MODE_Struct MODE ; // Base Address + 0x0 member
DSI32_EPCACH_A_Registers.h345 struct SI32_EPCACH_A_MODE_Struct MODE ; // Base Address + 0x0 member
DSI32_CMP_A_Registers.h419 struct SI32_CMP_A_MODE_Struct MODE ; // Base Address + 0x10 member
DSI32_UART_A_Type.h623 (basePointer->MODE.U32 = mode)
639 (basePointer->MODE.U32)
DSI32_USART_A_Type.h675 (basePointer->MODE.U32 = mode)
691 (basePointer->MODE.U32)
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/unified_peripheral_drivers/src/
Dsl_si91x_peripheral_gpio.c134 ULP_GPIO->PIN_CONFIG[pin].GPIO_CONFIG_REG_b.MODE = mode; // Set mode in ULP GPIO instance in sl_gpio_set_pin_mode()
140 GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].GPIO_CONFIG_REG_b.MODE = mode; in sl_gpio_set_pin_mode()
180 return (sl_gpio_mode_t)(ULP_GPIO->PIN_CONFIG[pin].GPIO_CONFIG_REG_b.MODE); in sl_gpio_get_pin_mode()
184 …return (sl_gpio_mode_t)(GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].GPIO_CONFIG_REG_b.MODE); in sl_gpio_get_pin_mode()

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