Searched refs:MCU_FSM (Results 1 – 8 of 8) sorted by relevance
552 MCU_FSM->MCU_FSM_PERI_CONFIG_REG_b.M4SS_CONTEXT_SWITCH_TOP_ULP_MODE = enCtxSel; in ps_power_state_change_ps4tops2()569 …MCU_FSM->MCU_FSM_POWER_CTRL_AND_DELAY_b.POWER_MUX_SEL_ULPSS_RAM = (unsigned int)(PwrMuxSelUlpssRam… in ps_power_state_change_ps4tops2()571 …MCU_FSM->MCU_FSM_POWER_CTRL_AND_DELAY_b.POWER_MUX_SEL_M4_ULP_RAM = (unsigned int)(pwrMuxSelM4UlpRa… in ps_power_state_change_ps4tops2()573 …MCU_FSM->MCU_FSM_POWER_CTRL_AND_DELAY_b.POWER_MUX_SEL_M4_ULP_RAM_16K = (unsigned int)(pwrMuxSelM4U… in ps_power_state_change_ps4tops2()575 …MCU_FSM->MCU_FSM_POWER_CTRL_AND_DELAY_b.POWER_MUX_SEL_M4_ULP = (unsigned int)(pwrMuxSelM4Ulp & 0x3… in ps_power_state_change_ps4tops2()577 …MCU_FSM->MCU_FSM_POWER_CTRL_AND_DELAY_b.POWER_MUX_SEL_ULPSS = (unsigned int)(pwrMuxSelUlpss & 0x1); in ps_power_state_change_ps4tops2()580 MCU_FSM->MCU_FSM_POWER_CTRL_AND_DELAY_b.FSM_PERI_SOC_LDO_EN = (unsigned int)(socLdoEnable & 0x1); in ps_power_state_change_ps4tops2()583 MCU_FSM->MCU_FSM_POWER_CTRL_AND_DELAY_b.FSM_PERI_DCDC_EN = 1; in ps_power_state_change_ps4tops2()584 MCU_FSM->MCU_FSM_PERI_CONFIG_REG_b.BGPMU_SAMPLING_EN_R = 0; in ps_power_state_change_ps4tops2()588 MCU_FSM->MCU_FSM_POWER_CTRL_AND_DELAY_b.FSM_PERI_DCDC_EN = (unsigned int)(socLdoEnable & 0x1); in ps_power_state_change_ps4tops2()[all …]
186 MCU_FSM->GPIO_WAKEUP_REGISTER |= npssGpioPinIntr; in RSI_NPSSGPIO_SetWkpGpio()196 MCU_FSM->GPIO_WAKEUP_REGISTER &= ~npssGpioPinIntr; in RSI_NPSSGPIO_ClrWkpGpio()
366 if (!((MCU_FSM->MCU_FSM_SLEEP_CTRLS_AND_WAKEUP_MODE_b.SDCSS_BASED_WAKEUP_b) in RSI_PS_EnterDeepSleep()367 || (MCU_FSM->MCU_FSM_SLEEP_CTRLS_AND_WAKEUP_MODE_b.ULPSS_BASED_WAKEUP_b))) { in RSI_PS_EnterDeepSleep()375 if (!((MCU_FSM->MCU_FSM_SLEEP_CTRLS_AND_WAKEUP_MODE_b.SDCSS_BASED_WAKEUP_b) in RSI_PS_EnterDeepSleep()376 || (MCU_FSM->MCU_FSM_SLEEP_CTRLS_AND_WAKEUP_MODE_b.ULPSS_BASED_WAKEUP_b))) { in RSI_PS_EnterDeepSleep()383 if (!(MCU_FSM->MCU_FSM_SLEEP_CTRLS_AND_WAKEUP_MODE_b.M4ULP_RAM_RETENTION_MODE_EN_b)) { in RSI_PS_EnterDeepSleep()407 if (!in_ps2_state && MCU_FSM->MCU_FSM_SLEEP_CTRLS_AND_WAKEUP_MODE_b.ULPSS_BASED_WAKEUP_b in RSI_PS_EnterDeepSleep()439 ipmuDummyRead = MCU_FSM->MCU_FSM_CLK_ENS_AND_FIRST_BOOTUP; in RSI_PS_EnterDeepSleep()602 if (!((in_ps2_state) && (MCU_FSM->MCU_FSM_SLEEP_CTRLS_AND_WAKEUP_MODE_b.ULPSS_BASED_WAKEUP_b))) { in RSI_PS_EnterDeepSleep()
133 MCU_FSM->MCU_FSM_REF_CLK_REG_b.TASS_REF_CLK_SEL = ULP_MHZ_RC_CLK; in SystemCoreClockUpdate()277 MCU_FSM->MCU_FSM_PERI_CONFIG_REG_b.WICENREQ = 0; in SystemInit()
125 MCU_FSM->MCU_FSM_SLEEP_CTRLS_AND_WAKEUP_MODE |= HPSRAM_RET_ULP_MODE_EN; in RSI_PS_PowerStateChangePs4toPs2()126 MCU_FSM->MCU_FSM_SLEEP_CTRLS_AND_WAKEUP_MODE |= TA_RAM_RETENTION_MODE_EN; in RSI_PS_PowerStateChangePs4toPs2()129 MCU_FSM->MCU_FSM_SLEEP_CTRLS_AND_WAKEUP_MODE |= HPSRAM_RET_ULP_MODE_EN; in RSI_PS_PowerStateChangePs4toPs2()130 MCU_FSM->MCU_FSM_SLEEP_CTRLS_AND_WAKEUP_MODE |= M4SS_RAM_RETENTION_MODE_EN; in RSI_PS_PowerStateChangePs4toPs2()314 if (MCU_FSM->MCU_FSM_CLK_ENS_AND_FIRST_BOOTUP_b.FIRST_BOOTUP_MCU_N_b == 0) { in RSI_PS_WirelessShutdown()
2330 MCU_FSM->MCU_FSM_CLK_ENS_AND_FIRST_BOOTUP_b.MCU_ULP_32KHZ_RC_CLK_EN_b = 1; in clk_slp_clk_config()2337 MCU_FSM->MCU_FSM_CLK_ENS_AND_FIRST_BOOTUP_b.MCU_ULP_32KHZ_XTAL_CLK_EN_b = 1; in clk_slp_clk_config()2348 MCU_FSM->MCU_FSM_CLK_ENS_AND_FIRST_BOOTUP_b.MCU_ULP_32KHZ_RO_CLK_EN_b = 1; in clk_slp_clk_config()2824 MCU_FSM->MCU_FSM_REF_CLK_REG_b.M4SS_REF_CLK_SEL = clkSource; in clk_m4ss_ref_clk_config()2830 MCU_FSM->MCU_FSM_REF_CLK_REG_b.M4SS_REF_CLK_SEL = clkSource; in clk_m4ss_ref_clk_config()2836 MCU_FSM->MCU_FSM_REF_CLK_REG_b.M4SS_REF_CLK_SEL = clkSource; in clk_m4ss_ref_clk_config()2843 MCU_FSM->MCU_FSM_REF_CLK_REG_b.M4SS_REF_CLK_SEL = clkSource; in clk_m4ss_ref_clk_config()2851 MCU_FSM->MCU_FSM_REF_CLK_REG_b.M4SS_REF_CLK_SEL = clkSource; in clk_m4ss_ref_clk_config()2860 MCU_FSM->MCU_FSM_REF_CLK_REG_b.M4SS_REF_CLK_SEL = clkSource; in clk_m4ss_ref_clk_config()2892 MCU_FSM->MCU_FSM_CLK_ENS_AND_FIRST_BOOTUP_b.MCU_ULP_40MHZ_CLK_EN_b = 0; in ulpss_disable_ref_clks()[all …]
1015 MCU_FSM->MCU_FSM_REF_CLK_REG_b.ULPSS_REF_CLK_SEL_b = clkSource; in ulpss_ref_clk_config()1021 MCU_FSM->MCU_FSM_REF_CLK_REG_b.ULPSS_REF_CLK_SEL_b = clkSource; in ulpss_ref_clk_config()1027 MCU_FSM->MCU_FSM_REF_CLK_REG_b.ULPSS_REF_CLK_SEL_b = clkSource; in ulpss_ref_clk_config()1034 MCU_FSM->MCU_FSM_REF_CLK_REG_b.ULPSS_REF_CLK_SEL_b = clkSource; in ulpss_ref_clk_config()1042 MCU_FSM->MCU_FSM_REF_CLK_REG_b.ULPSS_REF_CLK_SEL_b = clkSource; in ulpss_ref_clk_config()1051 MCU_FSM->MCU_FSM_REF_CLK_REG_b.ULPSS_REF_CLK_SEL_b = clkSource; in ulpss_ref_clk_config()
15988 #define MCU_FSM ((MCU_FSM_Type *)MCU_FSM_BASE) macro
