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Searched refs:MAX_GPIO_PORT_PIN (Results 1 – 4 of 4) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/unified_peripheral_drivers/src/
Dsl_si91x_peripheral_gpio.c140 GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].GPIO_CONFIG_REG_b.MODE = mode; in sl_gpio_set_pin_mode()
184 …return (sl_gpio_mode_t)(GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].GPIO_CONFIG_REG_b.MODE); in sl_gpio_get_pin_mode()
216 GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].GPIO_CONFIG_REG_b.DIRECTION = direction; in sl_si91x_gpio_set_pin_direction()
262 return GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].GPIO_CONFIG_REG_b.DIRECTION; in sl_si91x_gpio_get_pin_direction()
453 …GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].GPIO_CONFIG_REG_b.GROUP_INTERRUPT1_ENABLE = ENA… in sl_si91x_gpio_enable_group_interrupt()
456 …GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].GPIO_CONFIG_REG_b.GROUP_INTERRUPT2_ENABLE = ENA… in sl_si91x_gpio_enable_group_interrupt()
484 …GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].GPIO_CONFIG_REG_b.GROUP_INTERRUPT1_ENABLE = DIS… in sl_si91x_gpio_disable_group_interrupt()
487 …GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].GPIO_CONFIG_REG_b.GROUP_INTERRUPT2_ENABLE = DIS… in sl_si91x_gpio_disable_group_interrupt()
599 …GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].GPIO_CONFIG_REG_b.GROUP_INTERRUPT1_POLARITY = p… in sl_si91x_gpio_set_group_interrupt_polarity()
601 …GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].GPIO_CONFIG_REG_b.GROUP_INTERRUPT2_POLARITY = p… in sl_si91x_gpio_set_group_interrupt_polarity()
[all …]
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/unified_peripheral_drivers/inc/
Dsl_si91x_peripheral_gpio.h313 GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].BIT_LOAD_REG = SET; in sl_gpio_set_pin_output()
390 for (uint8_t i = (port * MAX_GPIO_PORT_PIN); i < (MAX_GPIO_PORT_PIN * (port + 1)); i++) { in sl_gpio_set_slew_rate()
415 GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].BIT_LOAD_REG = CLR; in sl_gpio_clear_pin_output()
476 return (uint8_t)GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].BIT_LOAD_REG; in sl_gpio_get_pin_input()
512 return (uint8_t)GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].BIT_LOAD_REG; in sl_gpio_get_pin_output()
587 GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].BIT_LOAD_REG ^= SET; in sl_gpio_toggle_pin_output()
Dsl_si91x_gpio_common.h95 #define MAX_GPIO_PORT_PIN 16 ///< GPIO maximum port pins macro
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/unified_api/src/
Dsl_si91x_driver_gpio.c205 if (m4_gpio_pad[(pin_config.port_pin.port * MAX_GPIO_PORT_PIN) + pin_config.port_pin.pin] in sl_gpio_set_configuration()
208 …if (m4_gpio_pad[(pin_config.port_pin.port * MAX_GPIO_PORT_PIN) + pin_config.port_pin.pin] != PAD_S… in sl_gpio_set_configuration()
211 … m4_gpio_pad[(pin_config.port_pin.port * MAX_GPIO_PORT_PIN) + pin_config.port_pin.pin]); in sl_gpio_set_configuration()
217 … m4_gpio_pad[(pin_config.port_pin.port * MAX_GPIO_PORT_PIN) + pin_config.port_pin.pin]); in sl_gpio_set_configuration()
231 … status = sl_si91x_gpio_driver_enable_pad_receiver((pin_config.port_pin.port * MAX_GPIO_PORT_PIN) in sl_gpio_set_configuration()