Searched refs:M4SS_CLK_PWR_CTRL_BASE_ADDR (Results 1 – 2 of 2) sorted by relevance
89 #define M4SS_CLK_ENABLE_SET_3_REG (*((volatile uint32_t *)(M4SS_CLK_PWR_CTRL_BASE_ADDR + 0x10)))
249 #define M4SS_CLK_PWR_CTRL_BASE_ADDR 0x46000000 macro