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Searched refs:LFECLKEN0 (Results 1 – 25 of 84) sorted by relevance

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/hal_silabs-latest/gecko/emlib/inc/
Dem_rtcc.h769 uint32_t lfeReg = CMU->LFECLKEN0; in RTCC_Lock()
774 CMU->LFECLKEN0 = 0x0; in RTCC_Lock()
779 CMU->LFECLKEN0 = lfeReg; in RTCC_Lock()
956 uint32_t lfeReg = CMU->LFECLKEN0; in RTCC_Unlock()
961 CMU->LFECLKEN0 = 0x0; in RTCC_Unlock()
966 CMU->LFECLKEN0 = lfeReg; in RTCC_Unlock()
/hal_silabs-latest/simplicity_sdk/platform/emlib/inc/
Dem_rtcc.h769 uint32_t lfeReg = CMU->LFECLKEN0; in RTCC_Lock()
774 CMU->LFECLKEN0 = 0x0; in RTCC_Lock()
779 CMU->LFECLKEN0 = lfeReg; in RTCC_Lock()
956 uint32_t lfeReg = CMU->LFECLKEN0; in RTCC_Unlock()
961 CMU->LFECLKEN0 = 0x0; in RTCC_Unlock()
966 CMU->LFECLKEN0 = lfeReg; in RTCC_Unlock()
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_cmu.h100 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_cmu.h100 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_cmu.h103 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_cmu.h103 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_cmu.h103 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_cmu.h103 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_cmu.h103 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
Defr32bg13p732f512gm32.h408 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
Defr32bg13p732f512gm48.h408 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
Defr32bg13p733f512gm48.h408 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
Defr32bg13p532f512gm48.h408 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
Defr32bg13p632f512gm32.h408 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
Defr32bg13p632f512gm48.h408 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
Defr32bg13p632f512im32.h408 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
Defr32bg13p632f512im48.h408 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
Defr32bg13p532f512gm32.h408 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_cmu.h103 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
Defm32gg12b390f1024gl112.h526 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
Defm32gg12b390f512gl112.h526 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
Defm32gg12b530f512il120.h572 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_cmu.h103 __IOM uint32_t LFECLKEN0; /**< Low Frequency E Clock Enable Register 0 (Async Reg) */ member
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_cmu.c7619 reg = &CMU->LFECLKEN0; in CMU_ClockEnable()
/hal_silabs-latest/gecko/emlib/src/
Dem_cmu.c7566 reg = &CMU->LFECLKEN0; in CMU_ClockEnable()

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