Home
last modified time | relevance | path

Searched refs:LDMA (Results 1 – 25 of 328) sorted by relevance

12345678910>>...14

/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_ldma.c66 LDMA->IFC = mask; in LDMA_IRQHandler()
83 LDMA->IEN = 0; in LDMA_DeInit()
85 LDMA->CHDIS = _LDMA_CHEN_MASK; in LDMA_DeInit()
87 LDMA->CHEN = 0; in LDMA_DeInit()
90 LDMA->EN = 0; in LDMA_DeInit()
92 while (LDMA->EN & _LDMA_EN_DISABLING_MASK) { in LDMA_DeInit()
121 BUS_RegBitWrite(&LDMA->REQDIS, ch, !enable); in LDMA_EnableChannelRequest()
157 LDMA->EN = LDMA_EN_EN; in LDMA_Init()
167 LDMA->CTRL = ldmaCtrlVal; in LDMA_Init()
170 LDMA->SYNCHWEN = ((uint32_t)init->ldmaInitCtrlSyncPrsClrEn << _LDMA_SYNCHWEN_SYNCCLREN_SHIFT) in LDMA_Init()
[all …]
Dem_msc.c723 LDMA->EN_SET = 0x1; in MSC_WriteWordDma()
726 LDMA->CH[ch].CFG = _LDMA_CH_CFG_RESETVALUE; in MSC_WriteWordDma()
727 LDMA->CH[ch].LOOP = _LDMA_CH_LOOP_RESETVALUE; in MSC_WriteWordDma()
728 LDMA->CH[ch].LINK = _LDMA_CH_LINK_RESETVALUE; in MSC_WriteWordDma()
753 LDMA->CH[ch].CTRL = LDMA_CH_CTRL_DSTINC_NONE in MSC_WriteWordDma()
756 LDMA->CH[ch].SRC = (uint32_t)src; in MSC_WriteWordDma()
757 LDMA->CH[ch].DST = (uint32_t)&MSC->WDATA; in MSC_WriteWordDma()
760 LDMA->CHEN_SET = (0x1 << ch); in MSC_WriteWordDma()
762 while ((LDMA->CHDONE & (0x1 << ch)) == 0x0) { in MSC_WriteWordDma()
766 LDMA->CHDONE_CLR = (0x1 << ch); in MSC_WriteWordDma()
[all …]
/hal_silabs-latest/gecko/emlib/src/
Dem_ldma.c66 LDMA->IFC = mask; in LDMA_IRQHandler()
83 LDMA->IEN = 0; in LDMA_DeInit()
85 LDMA->CHDIS = _LDMA_CHEN_MASK; in LDMA_DeInit()
87 LDMA->CHEN = 0; in LDMA_DeInit()
90 LDMA->EN = 0; in LDMA_DeInit()
92 while (LDMA->EN & _LDMA_EN_DISABLING_MASK) { in LDMA_DeInit()
121 BUS_RegBitWrite(&LDMA->REQDIS, ch, !enable); in LDMA_EnableChannelRequest()
171 LDMA->EN = LDMA_EN_EN; in LDMA_Init()
181 LDMA->CTRL = ldmaCtrlVal; in LDMA_Init()
184 LDMA->SYNCHWEN = ((uint32_t)init->ldmaInitCtrlSyncPrsClrEn << _LDMA_SYNCHWEN_SYNCCLREN_SHIFT) in LDMA_Init()
[all …]
Dem_msc.c721 LDMA->EN_SET = 0x1; in MSC_WriteWordDma()
724 LDMA->CH[ch].CFG = _LDMA_CH_CFG_RESETVALUE; in MSC_WriteWordDma()
725 LDMA->CH[ch].LOOP = _LDMA_CH_LOOP_RESETVALUE; in MSC_WriteWordDma()
726 LDMA->CH[ch].LINK = _LDMA_CH_LINK_RESETVALUE; in MSC_WriteWordDma()
751 LDMA->CH[ch].CTRL = LDMA_CH_CTRL_DSTINC_NONE in MSC_WriteWordDma()
754 LDMA->CH[ch].SRC = (uint32_t)src; in MSC_WriteWordDma()
755 LDMA->CH[ch].DST = (uint32_t)&MSC->WDATA; in MSC_WriteWordDma()
758 LDMA->CHEN_SET = (0x1 << ch); in MSC_WriteWordDma()
760 while ((LDMA->CHDONE & (0x1 << ch)) == 0x0) { in MSC_WriteWordDma()
764 LDMA->CHDONE_CLR = (0x1 << ch); in MSC_WriteWordDma()
[all …]
/hal_silabs-latest/simplicity_sdk/platform/emlib/inc/
Dem_ldma.h2676 LDMA->SWRST_SET = LDMA_SWRST_SWRST; in LDMA_Reset()
2679 while (0UL != (LDMA->SWRST & _LDMA_SWRST_RESETTING_MASK)) { in LDMA_Reset()
2701 return (0UL != (LDMA->CHSTATUS & (1UL << (uint8_t)ch))); in LDMA_ChannelEnabled()
2705 return (0UL != (LDMA->CHEN & (1 << (uint8_t)ch))); in LDMA_ChannelEnabled()
2721 LDMA->IF_CLR = flags; in LDMA_IntClear()
2723 LDMA->IFC = flags; in LDMA_IntClear()
2738 LDMA->IEN &= ~flags; in LDMA_IntDisable()
2757 LDMA->IEN |= flags; in LDMA_IntEnable()
2774 return LDMA->IF; in LDMA_IntGet()
2795 ien = LDMA->IEN; in LDMA_IntGetEnabled()
[all …]
/hal_silabs-latest/gecko/emlib/inc/
Dem_ldma.h2671 LDMA->SWRST_SET = LDMA_SWRST_SWRST; in LDMA_Reset()
2674 while (0UL != (LDMA->SWRST & _LDMA_SWRST_RESETTING_MASK)) { in LDMA_Reset()
2696 return (0UL != (LDMA->CHSTATUS & (1UL << (uint8_t)ch))); in LDMA_ChannelEnabled()
2700 return (0UL != (LDMA->CHEN & (1 << (uint8_t)ch))); in LDMA_ChannelEnabled()
2716 LDMA->IF_CLR = flags; in LDMA_IntClear()
2718 LDMA->IFC = flags; in LDMA_IntClear()
2733 LDMA->IEN &= ~flags; in LDMA_IntDisable()
2752 LDMA->IEN |= flags; in LDMA_IntEnable()
2769 return LDMA->IF; in LDMA_IntGet()
2790 ien = LDMA->IEN; in LDMA_IntGetEnabled()
[all …]
/hal_silabs-latest/simplicity_sdk/platform/emdrv/dmadrv/src/
Ddmadrv.c920 if ( LDMA->IF & (1 << channelId) ) in DMADRV_TransferCompletePending()
1071 pending = LDMA->IF; in LDMA_IRQHandler()
1072 pending &= LDMA->IEN; in LDMA_IRQHandler()
1089 LDMA->IF_CLR = chmask; in LDMA_IRQHandler()
1091 LDMA->IFC = chmask; in LDMA_IRQHandler()
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b100f128gm32.h340 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro
Defm32pg1b100f128im32.h340 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro
Defm32pg1b100f256gm32.h340 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro
Defm32pg1b100f256im32.h340 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro
Defm32pg1b200f128gm32.h342 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro
Defm32pg1b200f128gm48.h342 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro
Defm32pg1b200f128im32.h342 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro
Defm32pg1b200f256im32.h342 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro
Defm32pg1b200f256im48.h342 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro
Defm32pg1b200f256gm32.h342 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro
Defm32pg1b200f256gm48.h342 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p133f256gm32.h356 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro
Defr32fg1p133f256gm48.h356 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro
Defr32fg1p133f64gm48.h356 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro
Defr32fg1p132f64gm32.h356 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro
Defr32fg1p131f128gm48.h356 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro
Defr32fg1p131f256gm32.h356 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro
Defr32fg1p131f64gm32.h356 #define LDMA ((LDMA_TypeDef *) LDMA_BASE) /**< LDMA base pointer */ macro

12345678910>>...14