1 /******************************************************************************* 2 * @file rsi_error.h 3 ******************************************************************************* 4 * # License 5 * <b>Copyright 2024 Silicon Laboratories Inc. www.silabs.com</b> 6 ******************************************************************************* 7 * 8 * SPDX-License-Identifier: Zlib 9 * 10 * The licensor of this software is Silicon Laboratories Inc. 11 * 12 * This software is provided 'as-is', without any express or implied 13 * warranty. In no event will the authors be held liable for any damages 14 * arising from the use of this software. 15 * 16 * Permission is granted to anyone to use this software for any purpose, 17 * including commercial applications, and to alter it and redistribute it 18 * freely, subject to the following restrictions: 19 * 20 * 1. The origin of this software must not be misrepresented; you must not 21 * claim that you wrote the original software. If you use this software 22 * in a product, an acknowledgment in the product documentation would be 23 * appreciated but is not required. 24 * 2. Altered source versions must be plainly marked as such, and must not be 25 * misrepresented as being the original software. 26 * 3. This notice may not be removed or altered from any source distribution. 27 * 28 ******************************************************************************/ 29 30 #include <stdint.h> 31 32 #ifndef __RSI_ERROR_H__ 33 #define __RSI_ERROR_H__ 34 35 #ifdef __cplusplus 36 extern "C" { 37 #endif 38 39 typedef enum errnoCode { 40 RSI_FAIL = -1, 41 RSI_OK = 0, 42 INVALID_PARAMETERS = 1, 43 44 /*USART error codes*/ 45 ERROR_USART_BASE = 0x100, 46 ERROR_USART_CALLBACK_ERR = ERROR_USART_BASE + 1, 47 ERROR_USART_NOT_SUPPORTED = ERROR_USART_CALLBACK_ERR + 1, 48 49 /* GPDMA error codes */ 50 ERROR_GPDMA_BASE = 0x200, 51 ERROR_GPDMA_INVALIDCHNLNUM = ERROR_GPDMA_BASE + 1, 52 ERROR_GPDMA_FLW_CTRL = ERROR_GPDMA_INVALIDCHNLNUM + 1, 53 ERROR_GPDMA_BURST = ERROR_GPDMA_FLW_CTRL + 1, 54 ERROR_GPDMA_SRC_ADDR = ERROR_GPDMA_BURST + 1, 55 ERROR_GPDMA_DST_ADDR = ERROR_GPDMA_SRC_ADDR + 1, 56 NOERR_GPDMA_FLAG_SET = ERROR_GPDMA_DST_ADDR + 1, 57 ERROR_GPDMA_INVALID_EVENT = NOERR_GPDMA_FLAG_SET + 1, 58 ERROR_GPDMA_INVALID_XFERMODE = ERROR_GPDMA_INVALID_EVENT + 1, 59 ERROR_GPDMA_INVALID_TRANS_LEN = ERROR_GPDMA_INVALID_XFERMODE + 1, 60 ERROR_GPDMA_INVALID_ARG = ERROR_GPDMA_INVALID_TRANS_LEN + 1, 61 ERROR_GPDMA_CHNL_BUSY = ERROR_GPDMA_INVALID_ARG + 1, 62 ERROR_GPDMA_NOT_ALIGNMENT = ERROR_GPDMA_CHNL_BUSY + 1, 63 ERROR_GPDMA_QUEUE_EMPTY = ERROR_GPDMA_NOT_ALIGNMENT + 1, 64 ERROR_GPDMA_GENERAL = ERROR_GPDMA_QUEUE_EMPTY + 1, 65 66 /* UDMA error codes */ 67 ERROR_UDMA_BASE = 0x300, 68 ERROR_UDMA_INVALIDCHNLNUM = ERROR_UDMA_BASE + 1, 69 ERROR_UDMA_CTRL_BASE_INVALID = ERROR_UDMA_INVALIDCHNLNUM + 1, 70 ERROR_UDMA_INVALID_XFERMODE = ERROR_UDMA_CTRL_BASE_INVALID + 1, 71 ERROR_UDMA_INVALID_TRANS_LEN = ERROR_UDMA_INVALID_XFERMODE + 1, 72 ERROR_UDMA_INVALID_ARG = ERROR_UDMA_INVALID_TRANS_LEN + 1, 73 ERROR_UDMA_SRC_ADDR = ERROR_UDMA_INVALID_ARG + 1, 74 ERROR_UDMA_DST_ADDR = ERROR_UDMA_SRC_ADDR + 1, 75 ERROR_UDMA_CHNL_BUSY = ERROR_UDMA_DST_ADDR + 1, 76 77 /* I2C error codes */ 78 ERROR_I2C_BASE = 0x400, 79 ERROR_I2C_INVALID_ARG = ERROR_I2C_BASE + 1, 80 ERROR_I2CS_UNKNOWN = ERROR_I2C_INVALID_ARG + 1, 81 ERROR_I2C_SPIKE_LOGIC = ERROR_I2CS_UNKNOWN + 1, 82 ERROR_I2C_IGNORE_GC_OR_START = ERROR_I2C_SPIKE_LOGIC + 1, 83 ERROR_I2C_STATUS_FLAG_NOT_SET = ERROR_I2C_IGNORE_GC_OR_START + 1, 84 ERROR_I2C_BUSY_FLAG = ERROR_I2C_STATUS_FLAG_NOT_SET + 1, 85 ERROR_I2C_MST_BUSY_FLAG = ERROR_I2C_BUSY_FLAG + 1, 86 ERROR_I2C_SLV_BUSY_FLAG = ERROR_I2C_MST_BUSY_FLAG + 1, 87 ERROR_I2C_SLV_DIS_WHILE_BUSY = ERROR_I2C_SLV_BUSY_FLAG + 1, 88 ERROR_I2C_MST_XFER_ABORT = ERROR_I2C_SLV_DIS_WHILE_BUSY + 1, 89 ERROR_I2C_MST_TX_CMD_BLOCK = ERROR_I2C_MST_XFER_ABORT + 1, 90 ERROR_I2C_SLV_RX_DATA_LOST = ERROR_I2C_MST_TX_CMD_BLOCK + 1, 91 ERROR_I2C_NO_TX_DATA = ERROR_I2C_SLV_RX_DATA_LOST + 1, 92 ERROR_I2C_NO_INTR_FLAG = ERROR_I2C_NO_TX_DATA + 1, 93 ERROR_I2C_ERROR_FLAG_NONE = ERROR_I2C_NO_INTR_FLAG + 1, 94 ERROR_I2C_INVALID_CB = ERROR_I2C_ERROR_FLAG_NONE + 1, 95 ERROR_I2C_INVALID_POINTER = ERROR_I2C_INVALID_CB + 1, 96 ERROR_I2C_GENERAL_FAILURE = ERROR_I2C_INVALID_POINTER + 1, 97 ERROR_I2C_TXABORT = ERROR_I2C_GENERAL_FAILURE + 1, 98 ERROR_I2C_SCL_STUCK_ATLOW = ERROR_I2C_TXABORT + 1, 99 ERROR_I2C_MST_ON_HOLD = ERROR_I2C_SCL_STUCK_ATLOW + 1, 100 ERROR_I2C_BUFFER_OVERFLOW = ERROR_I2C_MST_ON_HOLD + 1, 101 ERROR_I2C_BUFFER_UNDERFLOW = ERROR_I2C_BUFFER_OVERFLOW + 1, 102 103 /* I2S error codes */ 104 ERROR_I2S_BASE = 0x500, 105 ERROR_I2S_INVALID_ARG = ERROR_I2S_BASE + 1, 106 ERROR_I2S_INVALID_RES = ERROR_I2S_INVALID_ARG + 1, 107 ERROR_I2S_INVALID_LENGTH = ERROR_I2S_INVALID_RES + 1, 108 ERROR_I2S_BUSY = ERROR_I2S_INVALID_LENGTH + 1, 109 ERROR_I2S_TXOVERRUN = ERROR_I2S_BUSY + 1, 110 ERROR_I2S_RXOVERRUN = ERROR_I2S_TXOVERRUN + 1, 111 ERROR_I2S_TXCOMPLETE = ERROR_I2S_RXOVERRUN + 1, 112 ERROR_I2S_RXCOMPLETE = ERROR_I2S_TXCOMPLETE + 1, 113 114 /* UART error codes */ 115 ERROR_UART_BASE = 0x600, 116 ERROR_UART_INVALID_ARG = ERROR_UART_BASE + 1, 117 ERROR_UART_INVALID_RES = ERROR_UART_INVALID_ARG + 1, 118 119 /* PWM error codes */ 120 ERROR_PWM_BASE = 0x700, 121 ERROR_PWM_INVALID_CHNLNUM = ERROR_PWM_BASE + 1, 122 ERROR_PWM_INVALID_PWMOUT = ERROR_PWM_INVALID_CHNLNUM + 1, 123 ERROR_PWM_NO_INTR = ERROR_PWM_INVALID_PWMOUT + 1, 124 ERROR_PWM_INVALID_ARG = ERROR_PWM_NO_INTR + 1, 125 126 /* Timers error codes */ 127 ERROR_TIMER_BASE = 0x800, 128 ERROR_INVAL_TIMER_NUM = ERROR_TIMER_BASE + 1, 129 ERROR_INVAL_TIMER_MODE = ERROR_INVAL_TIMER_NUM + 1, 130 ERROR_INVAL_TIMERTYPE = ERROR_INVAL_TIMER_MODE + 1, 131 ERROR_INVAL_COUNTER_DIR = ERROR_INVAL_TIMERTYPE + 1, 132 133 /* SCT error codes */ 134 ERROR_CT_BASE = 0x900, 135 ERROR_CT_INVALID_COUNTER_NUM = ERROR_CT_BASE + 1, 136 ERROR_CT_INVALID_ARG = ERROR_CT_INVALID_COUNTER_NUM + 1, 137 138 /* EFUSE ERROR CODES */ 139 ERROR_EFUSE_BASE = 0xA00, 140 ERROR_EFUSE_INVALID_WRITE_ADDRESS = ERROR_EFUSE_BASE + 1, 141 ERROR_EFUSE_INVALID_WRITE_BIT_POSITION = ERROR_EFUSE_INVALID_WRITE_ADDRESS + 1, 142 ERROR_EFUSE_INVALID_PARAMETERS = ERROR_EFUSE_INVALID_WRITE_BIT_POSITION + 1, 143 144 /* CCI ERROR CODES */ 145 ERROR_CCI_BASE_ADDRESS = 0xB00, 146 ERROR_CCI_INIT_FAIL = ERROR_CCI_BASE_ADDRESS + 1, 147 ERROR_CCI_ADDRESS_ERR = ERROR_CCI_INIT_FAIL + 1, 148 149 /* QEI ERROR CODES */ 150 ERROR_QEI_BASE = 0xC00, 151 ERROR_INVALID_WRITE_ADDRESS = ERROR_QEI_BASE + 1, 152 ERROR_INVALID_WRITE_BIT_POSITION = ERROR_INVALID_WRITE_ADDRESS + 1, 153 ERROR_INVALID_PARAMETERS = ERROR_INVALID_WRITE_BIT_POSITION + 1, 154 155 /* SDIO ERROR CODES */ 156 ERROR_SSDIO_BASE_ADDRESS = 0xD00, /*!< SDIO Error base address */ 157 ERROR_SSDIO_INIT_FAIL = ERROR_SSDIO_BASE_ADDRESS + 1, 158 ERROR_SSDIO_ADDRESS_ERR = ERROR_SSDIO_INIT_FAIL + 1, 159 ERROR_SSDIO_INVALID_FN = ERROR_SSDIO_ADDRESS_ERR + 1, 160 ERROR_SSDIO_INVALID_PARAM = ERROR_SSDIO_INVALID_FN + 1, 161 162 /* SPI ERROR CODES*/ 163 ERROR_SSPI_BASE_ADDRESS = 0xE00, 164 ERROR_SSPI_INIT_FAIL = ERROR_SSPI_BASE_ADDRESS + 1, 165 ERROR_SSPI_ADDRESS_ERR = ERROR_SSPI_INIT_FAIL + 1, 166 ERROR_SSPI_CB_ERROR = ERROR_SSPI_ADDRESS_ERR + 1, 167 168 /* ETHERNET ERROR CODES */ 169 ERROR_ETH_BASE_ADDRESS = 0xF00, 170 ERROR_ETH_INIT_FAIL = ERROR_ETH_BASE_ADDRESS + 1, 171 ERROR_ETH_PARAM = ERROR_ETH_INIT_FAIL + 1, 172 ERROR_ETH_NULL = ERROR_ETH_PARAM + 1, 173 ERR_DMA_NOT_ALIGNMENT = ERROR_ETH_NULL + 1, 174 ERROR_ETH_CALLBACK_ERR = ERR_DMA_NOT_ALIGNMENT + 1, 175 176 /*CAN ERROR CODES*/ 177 ERROR_CAN_BASE = 0x1000, 178 ERROR_CAN_INVALID_PARAMETERS = ERROR_CAN_BASE + 1, 179 ERROR_CAN_INVALID_TIMING_PARAMETERS = ERROR_CAN_INVALID_PARAMETERS + 1, 180 ERROR_CAN_OPERATION_IN_PROGRESS = ERROR_CAN_INVALID_TIMING_PARAMETERS + 1, 181 182 /*GSPI ERROR CODES*/ 183 ERROR_GSPI_BASE = 0x1100, 184 ERROR_GSPI_INVALID_ARG = ERROR_GSPI_BASE + 1, 185 ERROR_GSPI_INVALID_LENGTH = ERROR_GSPI_BASE + 2, 186 ERROR_GSPI_BUSY = ERROR_GSPI_BASE + 3, 187 ERROR_GSPI_READ_DONE = ERROR_GSPI_BASE + 4, 188 ERROR_GSPI_IDLE = ERROR_GSPI_BASE + 5, 189 ERROR_GSPI_TX_DONE = ERROR_GSPI_BASE + 6, 190 191 /*SSI ERROR CODES*/ 192 ERROR_SSI_BASE = 0x1200, 193 ERROR_SSI_INVALID_ARG = ERROR_SSI_BASE + 1, 194 ERROR_SSI_BUSY = ERROR_SSI_BASE + 2, 195 ERROR_SSI_IDLE = ERROR_SSI_BASE + 3, 196 TRANSFER_COMPLETE = ERROR_SSI_BASE + 4, 197 READ_COMPLETED = ERROR_SSI_BASE + 5, 198 199 /*SSI ERROR CODES*/ 200 ERROR_CRC_BASE = 0x1300, 201 ERROR_CRC_INVALID_ARG = ERROR_CRC_BASE + 1, 202 203 /*SSI ERROR CODES*/ 204 ERROR_RNG_BASE = 0x1400, 205 ERROR_RNG_INVALID_ARG = ERROR_RNG_BASE + 1, 206 207 /*NPSS ERROR CODES*/ 208 ERROR_BOD_BASE = 0x1500, 209 ERROR_PS_BASE = ERROR_BOD_BASE + 1, 210 ERROR_BOD_INVALID_PARAMETERS = ERROR_PS_BASE + 1, 211 ERROR_PS_INVALID_PARAMETERS = ERROR_BOD_INVALID_PARAMETERS + 1, 212 ERROR_PS_INVALID_STATE = ERROR_PS_INVALID_PARAMETERS + 1, 213 214 /*TIME PERIOD*/ 215 ERROR_TIMEPERIOD_BASE = 0x1600, 216 ERROR_TIME_PERIOD_PARAMETERS = ERROR_TIMEPERIOD_BASE + 1, 217 ERROR_TIME_PERIOD_RC_CALIB_NOT_DONE = ERROR_TIME_PERIOD_PARAMETERS + 1, 218 ERROR_CAL_INVALID_PARAMETERS = ERROR_TIME_PERIOD_RC_CALIB_NOT_DONE + 1, 219 220 /*M4SS CLOCKS */ 221 ERROR_M4SS_CLK_BASE = 0x1700, 222 ERROR_CLOCK_NOT_ENABLED = ERROR_M4SS_CLK_BASE + 1, 223 ERROR_INVALID_INPUT_FREQUENCY = ERROR_CLOCK_NOT_ENABLED + 1, 224 225 /*ULPSS CLOCKS */ 226 ERROR_ULPCLK_BASE = 1800, 227 ERROR_ULPCLK_INVALID_PARAMETERS = ERROR_ULPCLK_BASE + 1, 228 229 ERROR_SIO_BASE = 0x1900, 230 ERROR_SIO_I2C_NO_ACK = ERROR_SIO_BASE + 1, 231 232 /* ULPSS FIM */ 233 ERROR_FIM_BASE = 0x2000, 234 ERROR_FIM_MATRIX_INVALID_ARG = ERROR_FIM_BASE + 1, 235 236 /* AUX ADC */ 237 ERROR_NO_MULTI_CHNL_ENABLE = 0x2100, 238 NO_MODE_SET = ERROR_NO_MULTI_CHNL_ENABLE + 1, 239 ERROR_PING_PONG_ADDR_MATCH = ERROR_NO_MULTI_CHNL_ENABLE + 2, 240 ERROR_ADC_INVALID_ARG = ERROR_NO_MULTI_CHNL_ENABLE + 3, 241 INVALID_SAMPLING_RATE = ERROR_NO_MULTI_CHNL_ENABLE + 4, 242 INVALID_AUX_REF_VOLTAGE = ERROR_NO_MULTI_CHNL_ENABLE + 5, 243 INVALID_SAMPLE_LENGTH = ERROR_NO_MULTI_CHNL_ENABLE + 6, 244 INVALID_ADC_CHANNEL_ENABLE = ERROR_NO_MULTI_CHNL_ENABLE + 6, 245 246 /* AUX DAC */ 247 ERROR_NO_PAD_SEL = 0x2200, 248 ERROR_FREQ_VAL = ERROR_NO_PAD_SEL + 1, 249 250 /*SDMEM*/ 251 ERROR_ACCESS_RIGHTS = 0x2300, 252 ERROR_ADDR_ALIGHMENGT = ERROR_ACCESS_RIGHTS + 1, 253 ERROR_SMIH = ERROR_ADDR_ALIGHMENGT + 1, 254 ERROR_INAVLID_MODE = ERROR_SMIH + 1, 255 ERROR_OPERATION_INPROGRESS = ERROR_INAVLID_MODE + 1, 256 ERROR_NOT_READY = ERROR_OPERATION_INPROGRESS + 1, 257 ERROR_UNINITIALIZED = ERROR_NOT_READY + 1, 258 ERROR_BUFFER_FULL = ERROR_UNINITIALIZED + 1, 259 ERROR_TIMEOUT = ERROR_BUFFER_FULL + 1, 260 CARD_NOT_READY_OP = ERROR_TIMEOUT + 1, 261 CARD_TYPE_MEMCARD = CARD_NOT_READY_OP + 1, 262 } rsi_error_t; 263 264 #ifdef __cplusplus 265 } 266 #endif 267 268 #endif // __RSI_ERROR_H__ 269 270 /*END OF FILE */ 271
