Searched refs:INTF_PLL_500_CTRL_REG1 (Results 1 – 2 of 2) sorted by relevance
765 SPI_MEM_MAP_PLL(INTF_PLL_500_CTRL_REG1) |= PLL_500_CLK_ENABLE; in clk_intf_pll_clk_enable()768 SPI_MEM_MAP_PLL(INTF_PLL_500_CTRL_REG1) &= (uint16_t)(~(PLL_500_CLK_ENABLE)); in clk_intf_pll_clk_enable()785 SPI_MEM_MAP_PLL(INTF_PLL_500_CTRL_REG1) |= PLL_500_PD; in clk_intf_pll_pd_enable()788 SPI_MEM_MAP_PLL(INTF_PLL_500_CTRL_REG1) &= (uint16_t)(~(PLL_500_PD)); in clk_intf_pll_pd_enable()807 SPI_MEM_MAP_PLL(INTF_PLL_500_CTRL_REG1) = intfreg1; in clk_intf_pll_turn_off()889 SPI_MEM_MAP_PLL(INTF_PLL_500_CTRL_REG1) = intfreg1; in clk_set_intf_pll_freq()961 SPI_MEM_MAP_PLL(INTF_PLL_500_CTRL_REG1) = intfreg1; in clk_set_intf_pll_freq()974 SPI_MEM_MAP_PLL(INTF_PLL_500_CTRL_REG1) = intfreg1; in clk_set_intf_pll_freq()989 SPI_MEM_MAP_PLL(INTF_PLL_500_CTRL_REG1) = intfreg1; in clk_set_intf_pll_freq()1055 SPI_MEM_MAP_PLL(INTF_PLL_500_CTRL_REG1) = intfreg1; in clk_intf_pll_set_freq_div()[all …]
218 #define INTF_PLL_500_CTRL_REG1 0x20 /* Address for INTF_PLL_500_CTRL_REG1 register Access*/ macro
