Searched refs:I2S_PLL_CTRL_REG1 (Results 1 – 2 of 2) sorted by relevance
496 SPI_MEM_MAP_PLL(I2S_PLL_CTRL_REG1) |= PLL_500_CLK_ENABLE; in clk_i2s_pll_clk_enable()499 SPI_MEM_MAP_PLL(I2S_PLL_CTRL_REG1) &= (uint16_t)(~(PLL_500_CLK_ENABLE)); in clk_i2s_pll_clk_enable()516 SPI_MEM_MAP_PLL(I2S_PLL_CTRL_REG1) |= PLL_500_BYPASS; in clk_i2s_pll_clk_bypass_enable()519 SPI_MEM_MAP_PLL(I2S_PLL_CTRL_REG1) &= (uint16_t)(~(PLL_500_BYPASS)); in clk_i2s_pll_clk_bypass_enable()536 SPI_MEM_MAP_PLL(I2S_PLL_CTRL_REG1) |= PLL_500_PD; in clk_i2s_pll_pd_enable()539 SPI_MEM_MAP_PLL(I2S_PLL_CTRL_REG1) &= (uint16_t)(~(PLL_500_PD)); in clk_i2s_pll_pd_enable()557 SPI_MEM_MAP_PLL(I2S_PLL_CTRL_REG1) |= i2sreg1; in clk_i2s_pll_turn_off()573 SPI_MEM_MAP_PLL(I2S_PLL_CTRL_REG1) = i2sreg1; in clk_i2s_pll_turn_on()662 SPI_MEM_MAP_PLL(I2S_PLL_CTRL_REG1) = i2sreg1; in clk_set_i2s_pll_freq()713 SPI_MEM_MAP_PLL(I2S_PLL_CTRL_REG1) = i2sreg1; in clk_i2s_pll_set_freq_div()
233 #define I2S_PLL_CTRL_REG1 0x30 /* Address for I2S_PLL_CTRL_REG1 register Access*/ macro
