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Searched refs:GSPI_CTRL_REG1 (Results 1 – 3 of 3) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_ipmu.c515 while (GSPI_CTRL_REG1 & SPI_ACTIVE) in RSI_IPMU_PowerGateSet()
520 while (GSPI_CTRL_REG1 & SPI_ACTIVE) in RSI_IPMU_PowerGateSet()
555 while (GSPI_CTRL_REG1 & SPI_ACTIVE) in RSI_IPMU_PowerGateClr()
560 while (GSPI_CTRL_REG1 & SPI_ACTIVE) in RSI_IPMU_PowerGateClr()
579 while (GSPI_CTRL_REG1 & SPI_ACTIVE) in RSI_IPMU_ClockMuxSel()
582 while (GSPI_CTRL_REG1 & SPI_ACTIVE) in RSI_IPMU_ClockMuxSel()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/core/chip/src/
Dsystem_si91x.c260 while (GSPI_CTRL_REG1 & SPI_ACTIVE) in SystemInit()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_ipmu.h95 #define GSPI_CTRL_REG1 *(volatile uint32_t *)(REG_GSPI_BASE + 0x02) macro