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Searched refs:GPIO (Results 1 – 25 of 431) sorted by relevance

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/hal_silabs-latest/gecko/emlib/src/
Dem_gpio.c79 GPIO->ROUTE = (GPIO->ROUTE & ~_GPIO_ROUTE_SWLOCATION_MASK) in GPIO_DbgLocationSet()
84 GPIO->ROUTELOC0 = (GPIO->ROUTELOC0 & ~_GPIO_ROUTELOC0_SWVLOC_MASK) in GPIO_DbgLocationSet()
106 GPIO->P[port].CTRL = (GPIO->P[port].CTRL & ~(_GPIO_P_CTRL_DRIVEMODE_MASK)) in GPIO_DriveModeSet()
126 BUS_RegMaskedWrite(&GPIO->P[port].CTRL, in GPIO_DriveStrengthSet()
199 BUS_RegMaskedWrite(&GPIO->EXTIPSELL, in GPIO_ExtIntConfig()
207 BUS_RegMaskedWrite(&GPIO->EXTIPSELH, in GPIO_ExtIntConfig()
212 BUS_RegMaskedWrite(&GPIO->EXTIPSELH, in GPIO_ExtIntConfig()
227 BUS_RegMaskedWrite(&GPIO->EXTIPINSELL, in GPIO_ExtIntConfig()
234 BUS_RegMaskedWrite(&GPIO->EXTIPINSELH, in GPIO_ExtIntConfig()
241 BUS_RegMaskedWrite(&GPIO->EXTIPINSELH, in GPIO_ExtIntConfig()
[all …]
Dem_lcd.c310 GPIO->LCDSEGH_SET = 1 << (seg_nbr - 32); in LCD_SegmentEnable()
312 GPIO->LCDSEGL_SET = 1 << (seg_nbr); in LCD_SegmentEnable()
316 GPIO->LCDSEGH_CLR = 1 << (seg_nbr - 32); in LCD_SegmentEnable()
318 GPIO->LCDSEGL_CLR = 1 << (seg_nbr); in LCD_SegmentEnable()
323 GPIO->LCDSEG_SET = 1 << seg_nbr; in LCD_SegmentEnable()
325 GPIO->LCDSEG_CLR = 1 << seg_nbr; in LCD_SegmentEnable()
349 GPIO->LCDCOM_SET = 1 << com; in LCD_ComEnable()
351 GPIO->LCDCOM_CLR = 1 << com; in LCD_ComEnable()
361 GPIO->LCDSEGH_SET = 1 << ((com - LCD_COM_NUM) + LCD_SEGASCOM_SEGSTART - 32); in LCD_ComEnable()
363 GPIO->LCDSEGL_SET = 1 << ((com - LCD_COM_NUM) + LCD_SEGASCOM_SEGSTART); in LCD_ComEnable()
[all …]
Dem_prs.c599 addr = &GPIO->PRSROUTE[0].ASYNCH0ROUTE; in PRS_PinOutput()
601 addr = &GPIO->PRSROUTE[0].SYNCH0ROUTE; in PRS_PinOutput()
608 GPIO->PRSROUTE[0].ROUTEEN |= 0x1 << (ch + _GPIO_PRS_ROUTEEN_ASYNCH0PEN_SHIFT); in PRS_PinOutput()
610 GPIO->PRSROUTE[0].ROUTEEN |= 0x1 << (ch + _GPIO_PRS_ROUTEEN_SYNCH0PEN_SHIFT); in PRS_PinOutput()
Dem_usart.c820 GPIO->USARTROUTE_SET[USART_NUM(usart)].ROUTEEN = GPIO_USART_ROUTEEN_RTSPEN; in USART_InitAsync()
823 GPIO->USARTROUTE_SET[0].ROUTEEN = GPIO_USART_ROUTEEN_RTSPEN; in USART_InitAsync()
827 GPIO->USARTROUTE_CLR[USART_NUM(usart)].ROUTEEN = GPIO_USART_ROUTEEN_RTSPEN; in USART_InitAsync()
830 GPIO->USARTROUTE_CLR[0].ROUTEEN = GPIO_USART_ROUTEEN_RTSPEN; in USART_InitAsync()
Dem_eusart.c961 GPIO->EUARTROUTE_SET->ROUTEEN = GPIO_EUART_ROUTEEN_RTSPEN; in EUSART_AsyncInitCommon()
963 GPIO->EUSARTROUTE_SET[EUSART_NUM(eusart)].ROUTEEN = GPIO_EUSART_ROUTEEN_RTSPEN; in EUSART_AsyncInitCommon()
967 GPIO->EUARTROUTE_CLR->ROUTEEN = GPIO_EUART_ROUTEEN_RTSPEN; in EUSART_AsyncInitCommon()
969 GPIO->EUSARTROUTE_CLR[EUSART_NUM(eusart)].ROUTEEN = GPIO_EUSART_ROUTEEN_RTSPEN; in EUSART_AsyncInitCommon()
Dem_acmp.c437 GPIO->ACMPROUTE[acmpIndex].ACMPOUTROUTE = (port << _GPIO_ACMP_ACMPOUTROUTE_PORT_SHIFT) in ACMP_GPIOSetup()
439 GPIO->ACMPROUTE[acmpIndex].ROUTEEN = enable ? GPIO_ACMP_ROUTEEN_ACMPOUTPEN : 0; in ACMP_GPIOSetup()
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_gpio.c79 GPIO->ROUTE = (GPIO->ROUTE & ~_GPIO_ROUTE_SWLOCATION_MASK) in GPIO_DbgLocationSet()
84 GPIO->ROUTELOC0 = (GPIO->ROUTELOC0 & ~_GPIO_ROUTELOC0_SWVLOC_MASK) in GPIO_DbgLocationSet()
106 GPIO->P[port].CTRL = (GPIO->P[port].CTRL & ~(_GPIO_P_CTRL_DRIVEMODE_MASK)) in GPIO_DriveModeSet()
126 BUS_RegMaskedWrite(&GPIO->P[port].CTRL, in GPIO_DriveStrengthSet()
199 BUS_RegMaskedWrite(&GPIO->EXTIPSELL, in GPIO_ExtIntConfig()
207 BUS_RegMaskedWrite(&GPIO->EXTIPSELH, in GPIO_ExtIntConfig()
212 BUS_RegMaskedWrite(&GPIO->EXTIPSELH, in GPIO_ExtIntConfig()
227 BUS_RegMaskedWrite(&GPIO->EXTIPINSELL, in GPIO_ExtIntConfig()
234 BUS_RegMaskedWrite(&GPIO->EXTIPINSELH, in GPIO_ExtIntConfig()
241 BUS_RegMaskedWrite(&GPIO->EXTIPINSELH, in GPIO_ExtIntConfig()
[all …]
Dem_lcd.c310 GPIO->LCDSEGH_SET = 1 << (seg_nbr - 32); in LCD_SegmentEnable()
312 GPIO->LCDSEGL_SET = 1 << (seg_nbr); in LCD_SegmentEnable()
316 GPIO->LCDSEGH_CLR = 1 << (seg_nbr - 32); in LCD_SegmentEnable()
318 GPIO->LCDSEGL_CLR = 1 << (seg_nbr); in LCD_SegmentEnable()
323 GPIO->LCDSEG_SET = 1 << seg_nbr; in LCD_SegmentEnable()
325 GPIO->LCDSEG_CLR = 1 << seg_nbr; in LCD_SegmentEnable()
349 GPIO->LCDCOM_SET = 1 << com; in LCD_ComEnable()
351 GPIO->LCDCOM_CLR = 1 << com; in LCD_ComEnable()
361 GPIO->LCDSEGH_SET = 1 << ((com - LCD_COM_NUM) + LCD_SEGASCOM_SEGSTART - 32); in LCD_ComEnable()
363 GPIO->LCDSEGL_SET = 1 << ((com - LCD_COM_NUM) + LCD_SEGASCOM_SEGSTART); in LCD_ComEnable()
[all …]
Dem_prs.c599 addr = &GPIO->PRSROUTE[0].ASYNCH0ROUTE; in PRS_PinOutput()
601 addr = &GPIO->PRSROUTE[0].SYNCH0ROUTE; in PRS_PinOutput()
608 GPIO->PRSROUTE[0].ROUTEEN |= 0x1 << (ch + _GPIO_PRS_ROUTEEN_ASYNCH0PEN_SHIFT); in PRS_PinOutput()
610 GPIO->PRSROUTE[0].ROUTEEN |= 0x1 << (ch + _GPIO_PRS_ROUTEEN_SYNCH0PEN_SHIFT); in PRS_PinOutput()
Dem_usart.c820 GPIO->USARTROUTE_SET[USART_NUM(usart)].ROUTEEN = GPIO_USART_ROUTEEN_RTSPEN; in USART_InitAsync()
823 GPIO->USARTROUTE_SET[0].ROUTEEN = GPIO_USART_ROUTEEN_RTSPEN; in USART_InitAsync()
827 GPIO->USARTROUTE_CLR[USART_NUM(usart)].ROUTEEN = GPIO_USART_ROUTEEN_RTSPEN; in USART_InitAsync()
830 GPIO->USARTROUTE_CLR[0].ROUTEEN = GPIO_USART_ROUTEEN_RTSPEN; in USART_InitAsync()
Dem_eusart.c964 GPIO->EUARTROUTE_SET->ROUTEEN = GPIO_EUART_ROUTEEN_RTSPEN; in EUSART_AsyncInitCommon()
966 GPIO->EUSARTROUTE_SET[EUSART_NUM(eusart)].ROUTEEN = GPIO_EUSART_ROUTEEN_RTSPEN; in EUSART_AsyncInitCommon()
970 GPIO->EUARTROUTE_CLR->ROUTEEN = GPIO_EUART_ROUTEEN_RTSPEN; in EUSART_AsyncInitCommon()
972 GPIO->EUSARTROUTE_CLR[EUSART_NUM(eusart)].ROUTEEN = GPIO_EUSART_ROUTEEN_RTSPEN; in EUSART_AsyncInitCommon()
Dem_acmp.c437 GPIO->ACMPROUTE[acmpIndex].ACMPOUTROUTE = (port << _GPIO_ACMP_ACMPOUTROUTE_PORT_SHIFT) in ACMP_GPIOSetup()
439 GPIO->ACMPROUTE[acmpIndex].ROUTEEN = enable ? GPIO_ACMP_ROUTEEN_ACMPOUTPEN : 0; in ACMP_GPIOSetup()
/hal_silabs-latest/simplicity_sdk/platform/emlib/inc/
Dem_gpio.h717 BUS_RegBitWrite(&(GPIO->ROUTE), _GPIO_ROUTE_SWCLKPEN_SHIFT, bit); in GPIO_DbgSWDClkEnable()
719 BUS_RegBitWrite(&(GPIO->ROUTEPEN), _GPIO_ROUTEPEN_SWCLKTCKPEN_SHIFT, bit); in GPIO_DbgSWDClkEnable()
721 BUS_RegBitWrite(&(GPIO->DBGROUTEPEN), _GPIO_DBGROUTEPEN_SWCLKTCKPEN_SHIFT, bit); in GPIO_DbgSWDClkEnable()
744 BUS_RegBitWrite(&(GPIO->ROUTE), _GPIO_ROUTE_SWDIOPEN_SHIFT, bit); in GPIO_DbgSWDIOEnable()
746 BUS_RegBitWrite(&(GPIO->ROUTEPEN), _GPIO_ROUTEPEN_SWDIOTMSPEN_SHIFT, bit); in GPIO_DbgSWDIOEnable()
748 BUS_RegBitWrite(&(GPIO->DBGROUTEPEN), _GPIO_DBGROUTEPEN_SWDIOTMSPEN_SHIFT, bit); in GPIO_DbgSWDIOEnable()
778 BUS_RegBitWrite(&(GPIO->ROUTE), _GPIO_ROUTE_SWOPEN_SHIFT, bit); in GPIO_DbgSWOEnable()
780 BUS_RegBitWrite(&(GPIO->ROUTEPEN), _GPIO_ROUTEPEN_SWVPEN_SHIFT, bit); in GPIO_DbgSWOEnable()
782 BUS_RegBitWrite(&(GPIO->TRACEROUTEPEN), _GPIO_TRACEROUTEPEN_SWVPEN_SHIFT, bit); in GPIO_DbgSWOEnable()
810 GPIO->EM4WUEN &= ~pinmask; in GPIO_EM4DisablePinWakeup()
[all …]
/hal_silabs-latest/gecko/emlib/inc/
Dem_gpio.h632 BUS_RegBitWrite(&(GPIO->ROUTE), _GPIO_ROUTE_SWCLKPEN_SHIFT, bit); in GPIO_DbgSWDClkEnable()
634 BUS_RegBitWrite(&(GPIO->ROUTEPEN), _GPIO_ROUTEPEN_SWCLKTCKPEN_SHIFT, bit); in GPIO_DbgSWDClkEnable()
636 BUS_RegBitWrite(&(GPIO->DBGROUTEPEN), _GPIO_DBGROUTEPEN_SWCLKTCKPEN_SHIFT, bit); in GPIO_DbgSWDClkEnable()
659 BUS_RegBitWrite(&(GPIO->ROUTE), _GPIO_ROUTE_SWDIOPEN_SHIFT, bit); in GPIO_DbgSWDIOEnable()
661 BUS_RegBitWrite(&(GPIO->ROUTEPEN), _GPIO_ROUTEPEN_SWDIOTMSPEN_SHIFT, bit); in GPIO_DbgSWDIOEnable()
663 BUS_RegBitWrite(&(GPIO->DBGROUTEPEN), _GPIO_DBGROUTEPEN_SWDIOTMSPEN_SHIFT, bit); in GPIO_DbgSWDIOEnable()
693 BUS_RegBitWrite(&(GPIO->ROUTE), _GPIO_ROUTE_SWOPEN_SHIFT, bit); in GPIO_DbgSWOEnable()
695 BUS_RegBitWrite(&(GPIO->ROUTEPEN), _GPIO_ROUTEPEN_SWVPEN_SHIFT, bit); in GPIO_DbgSWOEnable()
697 BUS_RegBitWrite(&(GPIO->TRACEROUTEPEN), _GPIO_TRACEROUTEPEN_SWVPEN_SHIFT, bit); in GPIO_DbgSWOEnable()
725 GPIO->EM4WUEN &= ~pinmask; in GPIO_EM4DisablePinWakeup()
[all …]
/hal_silabs-latest/simplicity_sdk/platform/peripheral/inc/
Dsl_hal_gpio.h381 GPIO->LOCK = ~GPIO_LOCK_LOCKKEY_UNLOCK; in sl_hal_gpio_lock()
398 GPIO->LOCK = GPIO_LOCK_LOCKKEY_UNLOCK; in sl_hal_gpio_unlock()
408 return GPIO->GPIOLOCKSTATUS; in sl_hal_gpio_get_lock_status()
422 GPIO->P_SET[gpio->port].DOUT = 1UL << gpio->pin; in SL_CODE_CLASSIFY()
435 GPIO->P_SET[port].DOUT = pins; in sl_hal_gpio_set_port()
450 GPIO->P[port].DOUT = (GPIO->P[port].DOUT & ~mask) | (val & mask); in sl_hal_gpio_set_port_value()
466 GPIO->P[port].CTRL = (GPIO->P[port].CTRL in sl_hal_gpio_set_slew_rate()
484 GPIO->P[port].CTRL = (GPIO->P[port].CTRL in sl_hal_gpio_set_slew_rate_alternate()
500 return (GPIO->P[port].CTRL & _GPIO_P_CTRL_SLEWRATE_MASK) >> _GPIO_P_CTRL_SLEWRATE_SHIFT; in sl_hal_gpio_get_slew_rate()
514 return (GPIO->P[port].CTRL & _GPIO_P_CTRL_SLEWRATEALT_MASK) >> _GPIO_P_CTRL_SLEWRATEALT_SHIFT; in sl_hal_gpio_get_slew_rate_alternate()
[all …]
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/unified_peripheral_drivers/inc/
Dsl_si91x_peripheral_gpio.h313 GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].BIT_LOAD_REG = SET; in sl_gpio_set_pin_output()
345 GPIO->PORT_CONFIG[port].PORT_SET_REG = (pins); in sl_gpio_set_port_output()
372 …GPIO->PORT_CONFIG[port].PORT_SET_REG = (GPIO->PORT_CONFIG[port].PORT_SET_REG & ~mask) | (val & mas… in sl_gpio_set_port_output_value()
415 GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].BIT_LOAD_REG = CLR; in sl_gpio_clear_pin_output()
447 GPIO->PORT_CONFIG[port].PORT_CLEAR_REG = (pins); in sl_gpio_clear_port_output()
476 return (uint8_t)GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].BIT_LOAD_REG; in sl_gpio_get_pin_input()
512 return (uint8_t)GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].BIT_LOAD_REG; in sl_gpio_get_pin_output()
536 return GPIO->PORT_CONFIG[port].PORT_READ_REG & PORT_MASK; in sl_gpio_get_port_input()
560 return (GPIO->PORT_CONFIG[port].PORT_READ_REG & PORT_MASK); in sl_gpio_get_port_output()
587 GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].BIT_LOAD_REG ^= SET; in sl_gpio_toggle_pin_output()
[all …]
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/unified_peripheral_drivers/src/
Dsl_si91x_peripheral_gpio.c66 GPIO->INTR[int_no].GPIO_INTR_CTRL_b.PORT_NUMBER = port; in sl_gpio_configure_interrupt()
67 GPIO->INTR[int_no].GPIO_INTR_CTRL_b.PIN_NUMBER = (sl_si91x_gpio_pin_t)pin; in sl_gpio_configure_interrupt()
70 GPIO->INTR[int_no].GPIO_INTR_CTRL_b.FALL_EDGE_ENABLE = SL_GPIO_INTERRUPT_ENABLE; in sl_gpio_configure_interrupt()
72 GPIO->INTR[int_no].GPIO_INTR_CTRL_b.FALL_EDGE_ENABLE = SL_GPIO_INTERRUPT_DISABLE; in sl_gpio_configure_interrupt()
76 GPIO->INTR[int_no].GPIO_INTR_CTRL_b.RISE_EDGE_ENABLE = SL_GPIO_INTERRUPT_ENABLE; in sl_gpio_configure_interrupt()
78 GPIO->INTR[int_no].GPIO_INTR_CTRL_b.RISE_EDGE_ENABLE = SL_GPIO_INTERRUPT_DISABLE; in sl_gpio_configure_interrupt()
82 GPIO->INTR[int_no].GPIO_INTR_CTRL_b.LEVEL_HIGH_ENABLE = SL_GPIO_INTERRUPT_ENABLE; in sl_gpio_configure_interrupt()
86 GPIO->INTR[int_no].GPIO_INTR_CTRL_b.LEVEL_HIGH_ENABLE = SL_GPIO_INTERRUPT_DISABLE; in sl_gpio_configure_interrupt()
90 GPIO->INTR[int_no].GPIO_INTR_CTRL_b.LEVEL_LOW_ENABLE = SL_GPIO_INTERRUPT_ENABLE; in sl_gpio_configure_interrupt()
94 GPIO->INTR[int_no].GPIO_INTR_CTRL_b.LEVEL_LOW_ENABLE = SL_GPIO_INTERRUPT_DISABLE; in sl_gpio_configure_interrupt()
[all …]
/hal_silabs-latest/simplicity_sdk/platform/peripheral/src/
Dsl_hal_gpio.c195 …sl_hal_bus_reg_write_mask(&(GPIO->P[gpio->port].MODEL), 0xFu << (gpio->pin * 4), gpio_mode << (gpi… in sl_hal_gpio_set_pin_mode()
197 …sl_hal_bus_reg_write_mask(&(GPIO->P[gpio->port].MODEH), 0xFu << ((gpio->pin - 8) * 4), gpio_mode <… in sl_hal_gpio_set_pin_mode()
222 mode = (sl_gpio_mode_t) ((GPIO->P[gpio->port].MODEL >> (gpio->pin * 4)) & 0xF); in sl_hal_gpio_get_pin_mode()
224 mode = (sl_gpio_mode_t) ((GPIO->P[gpio->port].MODEH >> ((gpio->pin - 8) * 4)) & 0xF); in sl_hal_gpio_get_pin_mode()
329 sl_hal_bus_reg_write_mask(&GPIO->EXTIPSELL, in sl_hal_gpio_configure_external_interrupt()
336 sl_hal_bus_reg_write_mask(&GPIO->EXTIPINSELL, in sl_hal_gpio_configure_external_interrupt()
346 sl_hal_bus_reg_write_mask(&GPIO->EXTIPSELH, in sl_hal_gpio_configure_external_interrupt()
353 sl_hal_bus_reg_write_mask(&GPIO->EXTIPINSELH, in sl_hal_gpio_configure_external_interrupt()
364 … ? sl_hal_bus_reg_write_bit(&(GPIO->EXTIRISE), int_no, true) \ in sl_hal_gpio_configure_external_interrupt()
365 : sl_hal_bus_reg_write_bit(&(GPIO->EXTIRISE), int_no, false); in sl_hal_gpio_configure_external_interrupt()
[all …]
/hal_silabs-latest/simplicity_sdk/platform/service/clock_manager/src/
Dsl_clock_manager_init_hal_s2.c240 …(&(GPIO->PRSROUTE[0].ASYNCH0ROUTE))[HFXO_CRYSTSAL_SHARING_PRS_CHANNEL] = pin << _GPIO_PRS_ASYNCH0R… in init_hfxo()
242 …GPIO->PRSROUTE[0].ROUTEEN = 1U << (_GPIO_PRS_ROUTEEN_ASYNCH0PEN_SHIFT + HFXO_CRYSTSAL_SHARING_PRS_… in init_hfxo()
251 GPIO->SYXOROUTE[0].BUFOUTREQINASYNCROUTE = pin << _GPIO_SYXO_BUFOUTREQINASYNCROUTE_PIN_SHIFT in init_hfxo()
349 GPIO->CMUROUTE.CLKIN0ROUTE = (clkin0_gpio.port << _GPIO_CMU_CLKIN0ROUTE_PORT_SHIFT) in init_clkin0()
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b100f128gm32.h338 #define GPIO ((GPIO_TypeDef *) GPIO_BASE) /**< GPIO base pointer */ macro
Defm32pg1b100f128im32.h338 #define GPIO ((GPIO_TypeDef *) GPIO_BASE) /**< GPIO base pointer */ macro
Defm32pg1b100f256gm32.h338 #define GPIO ((GPIO_TypeDef *) GPIO_BASE) /**< GPIO base pointer */ macro
Defm32pg1b100f256im32.h338 #define GPIO ((GPIO_TypeDef *) GPIO_BASE) /**< GPIO base pointer */ macro
Defm32pg1b200f128gm32.h340 #define GPIO ((GPIO_TypeDef *) GPIO_BASE) /**< GPIO base pointer */ macro
Defm32pg1b200f128gm48.h340 #define GPIO ((GPIO_TypeDef *) GPIO_BASE) /**< GPIO base pointer */ macro

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