Searched refs:FLOWCN_CLR (Results 1 – 12 of 12) sorted by relevance
921 basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_RTS_MASK; in _SI32_USART_B_clear_rts()986 basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_RTSINVEN_MASK; in _SI32_USART_B_disable_rts_inversion()999 basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_RTSTH_MASK; in _SI32_USART_B_select_rts_deassert_on_full()1038 basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_RTSEN_MASK; in _SI32_USART_B_disable_rts()1064 basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_TXOEN_MASK; in _SI32_USART_B_disable_tx_output()1103 basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_TX_MASK; in _SI32_USART_B_clear_tx()1129 basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_UCLK_MASK; in _SI32_USART_B_set_sync_clock_low()1181 basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_CTSINVEN_MASK; in _SI32_USART_B_disable_cts_inversion()1207 basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_CTSEN_MASK; in _SI32_USART_B_disable_cts()1225 basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_TIRDAPW_MASK; in _SI32_USART_B_select_tx_irda_pulse_width()
1032 (basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_RTS_MASK)1097 (basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_RTSINVEN_MASK)1110 (basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_RTSTH_MASK)1149 (basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_RTSEN_MASK)1175 (basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_TXOEN_MASK)1214 (basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_TX_MASK)1240 (basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_UCLK_MASK)1292 (basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_CTSINVEN_MASK)1318 (basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_CTSEN_MASK)1342 basePointer->FLOWCN_CLR = SI32_USART_B_FLOWCN_TIRDAPW_MASK;\
920 basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_RTS_MASK; in _SI32_USART_A_clear_rts()985 basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_RTSINVEN_MASK; in _SI32_USART_A_disable_rts_inversion()998 basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_RTSTH_MASK; in _SI32_USART_A_select_rts_deassert_on_full()1037 basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_RTSEN_MASK; in _SI32_USART_A_disable_rts()1076 basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_TX_MASK; in _SI32_USART_A_clear_tx()1102 basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_UCLK_MASK; in _SI32_USART_A_set_sync_clock_low()1154 basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_CTSINVEN_MASK; in _SI32_USART_A_disable_cts_inversion()1180 basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_CTSEN_MASK; in _SI32_USART_A_disable_cts()1198 basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_TIRDAPW_MASK; in _SI32_USART_A_select_tx_irda_pulse_width()
712 basePointer->FLOWCN_CLR = SI32_UART_A_FLOWCN_RTS_MASK; in _SI32_UART_A_clear_rts()777 basePointer->FLOWCN_CLR = SI32_UART_A_FLOWCN_RTSINVEN_MASK; in _SI32_UART_A_disable_rts_inversion()790 basePointer->FLOWCN_CLR = SI32_UART_A_FLOWCN_RTSTH_MASK; in _SI32_UART_A_select_rts_deassert_on_full()829 basePointer->FLOWCN_CLR = SI32_UART_A_FLOWCN_RTSEN_MASK; in _SI32_UART_A_disable_rts()868 basePointer->FLOWCN_CLR = SI32_UART_A_FLOWCN_TX_MASK; in _SI32_UART_A_clear_tx()907 basePointer->FLOWCN_CLR = SI32_UART_A_FLOWCN_CTSINVEN_MASK; in _SI32_UART_A_disable_cts_inversion()933 basePointer->FLOWCN_CLR = SI32_UART_A_FLOWCN_CTSEN_MASK; in _SI32_UART_A_disable_cts()951 basePointer->FLOWCN_CLR = SI32_UART_A_FLOWCN_TIRDAPW_MASK; in _SI32_UART_A_select_tx_irda_pulse_width()
1032 (basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_RTS_MASK)1097 (basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_RTSINVEN_MASK)1110 (basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_RTSTH_MASK)1149 (basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_RTSEN_MASK)1188 (basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_TX_MASK)1214 (basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_UCLK_MASK)1266 (basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_CTSINVEN_MASK)1292 (basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_CTSEN_MASK)1316 basePointer->FLOWCN_CLR = SI32_USART_A_FLOWCN_TIRDAPW_MASK;\
824 (basePointer->FLOWCN_CLR = SI32_UART_A_FLOWCN_RTS_MASK)889 (basePointer->FLOWCN_CLR = SI32_UART_A_FLOWCN_RTSINVEN_MASK)902 (basePointer->FLOWCN_CLR = SI32_UART_A_FLOWCN_RTSTH_MASK)941 (basePointer->FLOWCN_CLR = SI32_UART_A_FLOWCN_RTSEN_MASK)980 (basePointer->FLOWCN_CLR = SI32_UART_A_FLOWCN_TX_MASK)1019 (basePointer->FLOWCN_CLR = SI32_UART_A_FLOWCN_CTSINVEN_MASK)1045 (basePointer->FLOWCN_CLR = SI32_UART_A_FLOWCN_CTSEN_MASK)1069 basePointer->FLOWCN_CLR = SI32_UART_A_FLOWCN_TIRDAPW_MASK;\
833 basePointer->FLOWCN_CLR = SI32_UART_B_FLOWCN_TXOEN_MASK; in _SI32_UART_B_disable_tx_output()859 basePointer->FLOWCN_CLR = SI32_UART_B_FLOWCN_TX_MASK; in _SI32_UART_B_clear_tx()890 basePointer->FLOWCN_CLR = SI32_UART_B_FLOWCN_TIRDAPW_MASK; in _SI32_UART_B_select_tx_irda_pulse_width()
949 (basePointer->FLOWCN_CLR = SI32_UART_B_FLOWCN_TXOEN_MASK)975 (basePointer->FLOWCN_CLR = SI32_UART_B_FLOWCN_TX_MASK)1012 basePointer->FLOWCN_CLR = SI32_UART_B_FLOWCN_TIRDAPW_MASK;\
1159 volatile uint32_t FLOWCN_CLR; member
1171 volatile uint32_t FLOWCN_CLR; member
1333 volatile uint32_t FLOWCN_CLR; member
1350 volatile uint32_t FLOWCN_CLR; member
