Searched refs:FIFOCN_SET (Results 1 – 12 of 12) sorted by relevance
2168 basePointer->FIFOCN_SET = SI32_USART_B_FIFOCN_RFTH_TWO_U32; in _SI32_USART_B_select_rx_fifo_threshold_2()2182 basePointer->FIFOCN_SET = SI32_USART_B_FIFOCN_RFTH_FOUR_U32; in _SI32_USART_B_select_rx_fifo_threshold_4()2195 basePointer->FIFOCN_SET = SI32_USART_B_FIFOCN_RDMAEN_ENABLED_U32; in _SI32_USART_B_enable_rx_fifo_dma_request()2221 basePointer->FIFOCN_SET = SI32_USART_B_FIFOCN_RFIFOFL_SET_U32; in _SI32_USART_B_flush_rx_fifo()2300 basePointer->FIFOCN_SET = SI32_USART_B_FIFOCN_TFTH_TWO_U32; in _SI32_USART_B_select_tx_fifo_threshold_for_request_to_2()2314 basePointer->FIFOCN_SET = SI32_USART_B_FIFOCN_TFTH_FOUR_U32; in _SI32_USART_B_select_tx_fifo_threshold_for_request_to_4()2327 basePointer->FIFOCN_SET = SI32_USART_B_FIFOCN_TDMAEN_ENABLED_U32; in _SI32_USART_B_enable_tx_fifo_dma_request()2353 basePointer->FIFOCN_SET = SI32_USART_B_FIFOCN_TFIFOFL_SET_U32; in _SI32_USART_B_flush_tx_fifo()
2141 basePointer->FIFOCN_SET = SI32_USART_A_FIFOCN_RFTH_TWO_U32; in _SI32_USART_A_select_rx_fifo_threshold_2()2155 basePointer->FIFOCN_SET = SI32_USART_A_FIFOCN_RFTH_FOUR_U32; in _SI32_USART_A_select_rx_fifo_threshold_4()2168 basePointer->FIFOCN_SET = SI32_USART_A_FIFOCN_RDMAEN_ENABLED_U32; in _SI32_USART_A_enable_rx_fifo_dma_request()2194 basePointer->FIFOCN_SET = SI32_USART_A_FIFOCN_RFIFOFL_SET_U32; in _SI32_USART_A_flush_rx_fifo()2273 basePointer->FIFOCN_SET = SI32_USART_A_FIFOCN_TFTH_TWO_U32; in _SI32_USART_A_select_tx_fifo_threshold_for_request_to_2()2287 basePointer->FIFOCN_SET = SI32_USART_A_FIFOCN_TFTH_FOUR_U32; in _SI32_USART_A_select_tx_fifo_threshold_for_request_to_4()2300 basePointer->FIFOCN_SET = SI32_USART_A_FIFOCN_TDMAEN_ENABLED_U32; in _SI32_USART_A_enable_tx_fifo_dma_request()2326 basePointer->FIFOCN_SET = SI32_USART_A_FIFOCN_TFIFOFL_SET_U32; in _SI32_USART_A_flush_tx_fifo()
2324 basePointer->FIFOCN_SET = SI32_USART_A_FIFOCN_RFTH_TWO_U32;\2339 basePointer->FIFOCN_SET = SI32_USART_A_FIFOCN_RFTH_FOUR_U32;\2353 (basePointer->FIFOCN_SET = SI32_USART_A_FIFOCN_RDMAEN_ENABLED_U32)2379 (basePointer->FIFOCN_SET = SI32_USART_A_FIFOCN_RFIFOFL_SET_U32)2458 basePointer->FIFOCN_SET = SI32_USART_A_FIFOCN_TFTH_TWO_U32;\2473 basePointer->FIFOCN_SET = SI32_USART_A_FIFOCN_TFTH_FOUR_U32;\2487 (basePointer->FIFOCN_SET = SI32_USART_A_FIFOCN_TDMAEN_ENABLED_U32)2513 (basePointer->FIFOCN_SET = SI32_USART_A_FIFOCN_TFIFOFL_SET_U32)
2350 basePointer->FIFOCN_SET = SI32_USART_B_FIFOCN_RFTH_TWO_U32;\2365 basePointer->FIFOCN_SET = SI32_USART_B_FIFOCN_RFTH_FOUR_U32;\2379 (basePointer->FIFOCN_SET = SI32_USART_B_FIFOCN_RDMAEN_ENABLED_U32)2405 (basePointer->FIFOCN_SET = SI32_USART_B_FIFOCN_RFIFOFL_SET_U32)2484 basePointer->FIFOCN_SET = SI32_USART_B_FIFOCN_TFTH_TWO_U32;\2499 basePointer->FIFOCN_SET = SI32_USART_B_FIFOCN_TFTH_FOUR_U32;\2513 (basePointer->FIFOCN_SET = SI32_USART_B_FIFOCN_TDMAEN_ENABLED_U32)2539 (basePointer->FIFOCN_SET = SI32_USART_B_FIFOCN_TFIFOFL_SET_U32)
1738 basePointer->FIFOCN_SET = SI32_UART_B_FIFOCN_RFTH_TWO_U32; in _SI32_UART_B_select_rx_fifo_threshold_2()1752 basePointer->FIFOCN_SET = SI32_UART_B_FIFOCN_RFTH_FOUR_U32; in _SI32_UART_B_select_rx_fifo_threshold_4()1765 basePointer->FIFOCN_SET = SI32_UART_B_FIFOCN_RFIFOFL_SET_U32; in _SI32_UART_B_flush_rx_fifo()1844 basePointer->FIFOCN_SET = SI32_UART_B_FIFOCN_TFTH_TWO_U32; in _SI32_UART_B_select_tx_fifo_threshold_for_request_to_2()1858 basePointer->FIFOCN_SET = SI32_UART_B_FIFOCN_TFTH_FOUR_U32; in _SI32_UART_B_select_tx_fifo_threshold_for_request_to_4()1871 basePointer->FIFOCN_SET = SI32_UART_B_FIFOCN_TFIFOFL_SET_U32; in _SI32_UART_B_flush_tx_fifo()
1868 basePointer->FIFOCN_SET = SI32_UART_A_FIFOCN_RFTH_TWO_U32; in _SI32_UART_A_select_rx_fifo_threshold_2()1882 basePointer->FIFOCN_SET = SI32_UART_A_FIFOCN_RFTH_FOUR_U32; in _SI32_UART_A_select_rx_fifo_threshold_4()1895 basePointer->FIFOCN_SET = SI32_UART_A_FIFOCN_RFIFOFL_SET_U32; in _SI32_UART_A_flush_rx_fifo()1974 basePointer->FIFOCN_SET = SI32_UART_A_FIFOCN_TFTH_TWO_U32; in _SI32_UART_A_select_tx_fifo_threshold_for_request_to_2()1988 basePointer->FIFOCN_SET = SI32_UART_A_FIFOCN_TFTH_FOUR_U32; in _SI32_UART_A_select_tx_fifo_threshold_for_request_to_4()2001 basePointer->FIFOCN_SET = SI32_UART_A_FIFOCN_TFIFOFL_MASK; in _SI32_UART_A_flush_tx_fifo()
2051 basePointer->FIFOCN_SET = SI32_UART_A_FIFOCN_RFTH_TWO_U32;\2066 basePointer->FIFOCN_SET = SI32_UART_A_FIFOCN_RFTH_FOUR_U32;\2080 (basePointer->FIFOCN_SET = SI32_UART_A_FIFOCN_RFIFOFL_SET_U32)2159 basePointer->FIFOCN_SET = SI32_UART_A_FIFOCN_TFTH_TWO_U32;\2174 basePointer->FIFOCN_SET = SI32_UART_A_FIFOCN_TFTH_FOUR_U32;\2188 (basePointer->FIFOCN_SET = SI32_UART_A_FIFOCN_TFIFOFL_MASK)
1921 basePointer->FIFOCN_SET = SI32_UART_B_FIFOCN_RFTH_TWO_U32;\1936 basePointer->FIFOCN_SET = SI32_UART_B_FIFOCN_RFTH_FOUR_U32;\1950 (basePointer->FIFOCN_SET = SI32_UART_B_FIFOCN_RFIFOFL_SET_U32)2029 basePointer->FIFOCN_SET = SI32_UART_B_FIFOCN_TFTH_TWO_U32;\2044 basePointer->FIFOCN_SET = SI32_UART_B_FIFOCN_TFTH_FOUR_U32;\2058 (basePointer->FIFOCN_SET = SI32_UART_B_FIFOCN_TFIFOFL_SET_U32)
1174 volatile uint32_t FIFOCN_SET; member
1186 volatile uint32_t FIFOCN_SET; member
1348 volatile uint32_t FIFOCN_SET; member
1365 volatile uint32_t FIFOCN_SET; member
