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Searched refs:ETH_INTF_PLL_CLK (Results 1 – 3 of 3) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/
Dclock_update.c530 case ETH_INTF_PLL_CLK: in RSI_CLK_GetBaseClock()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_pll.h598 ETH_INTF_PLL_CLK, /*!< ETH_INTF_PLL_CLK selection*/ enumerator
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_pll.c1802 if (clkSource == ETH_INTF_PLL_CLK) { in clk_ethernet_clk_config()