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Searched refs:ECC_RAM0_MEM_BASE (Results 1 – 2 of 2) sorted by relevance

/hal_silabs-latest/gecko/emlib/src/
Dem_msc.c76 #define ECC_RAM0_MEM_BASE (RAM0_MEM_BASE) macro
100 #define ECC_RAM0_MEM_BASE (RAM0_MEM_BASE) macro
179 #define ECC_RAM0_MEM_BASE (DMEM0_RAM0_RAM_MEM_BASE) macro
197 #define ECC_RAM0_MEM_BASE (SRAM_BASE) macro
273 ECC_RAM0_MEM_BASE, ECC_RAM0_MEM_SIZE
1575 if (eccBank->base == ECC_RAM0_MEM_BASE) { in mscEccReadWriteExistingPio()
1598 if (eccBank->base == ECC_RAM0_MEM_BASE) { in mscEccReadWriteExistingPio()
1846 if (eccBank->base == ECC_RAM0_MEM_BASE) { in mscEccBankInit()
1879 if (eccBank->base == ECC_RAM0_MEM_BASE) { in mscEccBankDisable()
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_msc.c76 #define ECC_RAM0_MEM_BASE (RAM0_MEM_BASE) macro
100 #define ECC_RAM0_MEM_BASE (RAM0_MEM_BASE) macro
180 #define ECC_RAM0_MEM_BASE (DMEM0_RAM0_RAM_MEM_BASE) macro
198 #define ECC_RAM0_MEM_BASE (SRAM_BASE) macro
275 ECC_RAM0_MEM_BASE, ECC_RAM0_MEM_SIZE
1578 if (eccBank->base == ECC_RAM0_MEM_BASE) { in mscEccReadWriteExistingPio()
1603 if (eccBank->base == ECC_RAM0_MEM_BASE) { in mscEccReadWriteExistingPio()
1852 if (eccBank->base == ECC_RAM0_MEM_BASE) { in mscEccBankInit()
1885 if (eccBank->base == ECC_RAM0_MEM_BASE) { in mscEccBankDisable()