Searched refs:DYN_CLK_GATE_DISABLE_REG_b (Results 1 – 2 of 2) sorted by relevance
2509 pCLK->DYN_CLK_GATE_DISABLE_REG_b.USART1_SCLK_DYN_CTRL_DISABLE_b = 0; in clk_peripheral_clk_enable()2510 pCLK->DYN_CLK_GATE_DISABLE_REG_b.USART1_PCLK_DYN_CTRL_DISABLE_b = 0; in clk_peripheral_clk_enable()2518 pCLK->DYN_CLK_GATE_DISABLE_REG_b.USART2_SCLK_DYN_CTRL_DISABLE_b = 0; in clk_peripheral_clk_enable()2519 pCLK->DYN_CLK_GATE_DISABLE_REG_b.USART2_PCLK_DYN_CTRL_DISABLE_b = 0; in clk_peripheral_clk_enable()2528 pCLK->DYN_CLK_GATE_DISABLE_REG_b.SSI_MST_SCLK_DYN_CTRL_DISABLE_b = 0; in clk_peripheral_clk_enable()2529 pCLK->DYN_CLK_GATE_DISABLE_REG_b.SSI_MST_PCLK_DYN_CTRL_DISABLE_b = 0; in clk_peripheral_clk_enable()2538 pCLK->DYN_CLK_GATE_DISABLE_REG_b.SSI_SLV_SCLK_DYN_CTRL_DISABLE_b = 0; in clk_peripheral_clk_enable()2539 pCLK->DYN_CLK_GATE_DISABLE_REG_b.SSI_SLV_PCLK_DYN_CTRL_DISABLE_b = 0; in clk_peripheral_clk_enable()2564 pCLK->DYN_CLK_GATE_DISABLE_REG_b.CCI_PCLK_DYN_CTRL_DISABLE_b = 0; in clk_peripheral_clk_enable()2643 pCLK->DYN_CLK_GATE_DISABLE_REG_b.USART1_SCLK_DYN_CTRL_DISABLE_b = 1; in clk_peripheral_clk_disable()[all …]
10858 } DYN_CLK_GATE_DISABLE_REG_b; member
