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Searched refs:DMEM_NS_BASE (Results 1 – 25 of 78) sorted by relevance

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/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32FG23/Include/
Defr32fg23b020f128gm40.h601 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
798 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
984 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32fg23b020f512im40.h601 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
798 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
984 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32fg23b021f512im40.h598 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
795 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
981 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32fg23a010f128gm40.h600 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
797 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
983 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32fg23a010f256gm40.h600 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
797 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
983 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32fg23a010f512gm40.h600 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
797 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
983 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32fg23a011f512gm40.h597 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
794 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
980 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32fg23a020f128gm40.h600 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
797 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
983 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32fg23a020f256gm40.h600 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
797 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
983 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32fg23a020f512gm40.h600 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
797 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
983 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32fg23a021f512gm40.h597 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
794 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
980 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32fg23b010f128gm40.h601 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
798 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
984 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32fg23b010f512im40.h601 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
798 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
984 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG29/Include/
Defr32bg29b220f1024cj45.h568 #define DMEM_NS_BASE (0x500B0000UL) /* DMEM_NS base address */ macro
750 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
902 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32bg29b221f1024cj45.h568 #define DMEM_NS_BASE (0x500B0000UL) /* DMEM_NS base address */ macro
750 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
902 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32bg29b140f1024im40.h583 #define DMEM_NS_BASE (0x500B0000UL) /* DMEM_NS base address */ macro
765 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
917 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32bg29b230f1024cm40.h582 #define DMEM_NS_BASE (0x500B0000UL) /* DMEM_NS base address */ macro
764 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
916 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG29/Include/
Defr32mg29b140f1024im40.h583 #define DMEM_NS_BASE (0x500B0000UL) /* DMEM_NS base address */ macro
765 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
917 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg29b230f1024cm40.h582 #define DMEM_NS_BASE (0x500B0000UL) /* DMEM_NS base address */ macro
764 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
916 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24a020f1024im48.h607 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
798 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
976 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a020f1536im40.h605 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
796 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
974 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a020f768im40.h605 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
796 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
974 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a410f1536im48.h609 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
800 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
978 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a420f1536im40.h605 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
796 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
974 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a420f1536im48.h607 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
798 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
976 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …

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