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Searched refs:DMAREQ_UART1_TXBL (Results 1 – 3 of 3) sorted by relevance

/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_dmareq.h93 #define DMAREQ_UART1_TXBL ((45 << 16) + 1) /**< DMA channel select for UART1_TXBL */ macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_dmareq.h81 #define DMAREQ_UART1_TXBL ((19 << 16) + 1) /**< DMA channel select for UART1_TXBL */ macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_dmareq.h84 #define DMAREQ_UART1_TXBL ((19 << 16) + 1) /**< DMA channel select for UART1_TXBL */ macro