Searched refs:DISABLE (Results 1 – 8 of 8) sorted by relevance
875 pMCPWM->PWM_TIME_PRD_CTRL_REG_CH0_b.PWM_SFT_RST = DISABLE; in RSI_PWM_Channel_Reset_Disable()878 pMCPWM->PWM_TIME_PRD_CTRL_REG_CH1_b.PWM_SFT_RST = DISABLE; in RSI_PWM_Channel_Reset_Disable()881 pMCPWM->PWM_TIME_PRD_CTRL_REG_CH2_b.PWM_SFT_RST = DISABLE; in RSI_PWM_Channel_Reset_Disable()884 pMCPWM->PWM_TIME_PRD_CTRL_REG_CH3_b.PWM_SFT_RST = DISABLE; in RSI_PWM_Channel_Reset_Disable()906 pMCPWM->PWM_TIME_PRD_CTRL_REG_CH0_b.PWM_TIME_PRD_CNTR_RST_FRM_REG = DISABLE; in RSI_PWM_Counter_Reset_Disable()909 pMCPWM->PWM_TIME_PRD_CTRL_REG_CH1_b.PWM_TIME_PRD_CNTR_RST_FRM_REG = DISABLE; in RSI_PWM_Counter_Reset_Disable()912 pMCPWM->PWM_TIME_PRD_CTRL_REG_CH2_b.PWM_TIME_PRD_CNTR_RST_FRM_REG = DISABLE; in RSI_PWM_Counter_Reset_Disable()915 pMCPWM->PWM_TIME_PRD_CTRL_REG_CH3_b.PWM_TIME_PRD_CNTR_RST_FRM_REG = DISABLE; in RSI_PWM_Counter_Reset_Disable()
110 pTIMER->MATCH_CTRL[timerNum].MCUULP_TMR_CNTRL_b.COUNTER_UP = DISABLE; in RSI_TIMERS_SetDirection()223 pTIMER->MATCH_CTRL[timerNum].MCUULP_TMR_CNTRL_b.TMR_INTR_ENABLE = DISABLE; in RSI_TIMERS_InterruptDisable()
325 pDrv->base->DMA_CFG_b.MASTER_ENABLE = DISABLE; in RSI_UDMA_UDMADisable()
50 #define DISABLE 0 macro
475 ULP_GPIO->GPIO_GRP_INTR[group_interrupt].GPIO_GRP_INTR_CTRL_REG_b.ENABLE_INTERRUPT = DISABLE; in sl_si91x_gpio_disable_group_interrupt()477 ULP_GPIO->PIN_CONFIG[pin].GPIO_CONFIG_REG_b.GROUP_INTERRUPT1_ENABLE = DISABLE; in sl_si91x_gpio_disable_group_interrupt()481 GPIO->GPIO_GRP_INTR[group_interrupt].GPIO_GRP_INTR_CTRL_REG_b.ENABLE_INTERRUPT = DISABLE; in sl_si91x_gpio_disable_group_interrupt()484 …->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].GPIO_CONFIG_REG_b.GROUP_INTERRUPT1_ENABLE = DISABLE; in sl_si91x_gpio_disable_group_interrupt()487 …->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].GPIO_CONFIG_REG_b.GROUP_INTERRUPT2_ENABLE = DISABLE; in sl_si91x_gpio_disable_group_interrupt()522 ULP_GPIO->GPIO_GRP_INTR[group_interrupt].GPIO_GRP_INTR_CTRL_REG_b.MASK = DISABLE; in sl_si91x_gpio_unmask_group_interrupt()525 GPIO->GPIO_GRP_INTR[group_interrupt].GPIO_GRP_INTR_CTRL_REG_b.MASK = DISABLE; in sl_si91x_gpio_unmask_group_interrupt()
129 #define DISABLE 0 macro
148 pstcWDT->MCU_WWD_ARM_STUCK_EN_b.PROCESSOR_STUCK_RESET_EN = DISABLE; in RSI_WWDT_SysRstOnProcLockDisable()
1441 pCLK->CLK_CONFIG_REG1_b.QSPI_CLK_SWALLOW_SEL = swalloEn ? ENABLE : DISABLE; in clk_qspi_clk_config()1442 pCLK->CLK_CONFIG_REG2_b.QSPI_ODD_DIV_SEL = OddDivEn ? ENABLE : DISABLE; in clk_qspi_clk_config()
