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Searched refs:DCDCLPVCTRL0 (Results 1 – 11 of 11) sorted by relevance

/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_devinfo.h99 __IM uint32_t DCDCLPVCTRL0; /**< DCDC Low-power VREF Trim Register 0 */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_devinfo.h103 __IM uint32_t DCDCLPVCTRL0; /**< DCDC Low-power VREF Trim Register 0 */ member
/hal_silabs-latest/gecko/emlib/src/
Dem_emu.c2280 if (DEVINFO->DCDCLPVCTRL0 != UINT_MAX) { in dcdcConstCalibrationLoad()
2646 vrefLow = DEVINFO->DCDCLPVCTRL0; in lpGetDevinfoVrefLowHigh()
2654 vrefLow = DEVINFO->DCDCLPVCTRL0; in lpGetDevinfoVrefLowHigh()
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_emu.c2335 if (DEVINFO->DCDCLPVCTRL0 != UINT_MAX) { in dcdcConstCalibrationLoad()
2701 vrefLow = DEVINFO->DCDCLPVCTRL0; in lpGetDevinfoVrefLowHigh()
2709 vrefLow = DEVINFO->DCDCLPVCTRL0; in lpGetDevinfoVrefLowHigh()
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_devinfo.h99 __IM uint32_t DCDCLPVCTRL0; /**< DCDC Low-power VREF Trim Register 0 */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_devinfo.h99 __IM uint32_t DCDCLPVCTRL0; /**< DCDC Low-power VREF Trim Register 0 */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_devinfo.h103 __IM uint32_t DCDCLPVCTRL0; /**< DCDC Low-power VREF Trim Register 0 */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_devinfo.h103 __IM uint32_t DCDCLPVCTRL0; /**< DCDC Low-power VREF Trim Register 0 */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_devinfo.h103 __IM uint32_t DCDCLPVCTRL0; /**< DCDC Low-power VREF Trim Register 0 */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_devinfo.h112 __IM uint32_t DCDCLPVCTRL0; /**< DCDC Low-power VREF Trim Register 0 */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_devinfo.h112 __IM uint32_t DCDCLPVCTRL0; /**< DCDC Low-power VREF Trim Register 0 */ member