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Searched refs:CT_MAX_CLK_DIVISION_FACTOR (Results 1 – 2 of 2) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_pll.h355 #define CT_MAX_CLK_DIVISION_FACTOR 63 /* Maximum division factor value for CT clock*/ macro
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_pll.c1937 if ((pCLK == NULL) || (divFactor > CT_MAX_CLK_DIVISION_FACTOR)) { in clk_ct_clk_config()