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Searched refs:CTRL_CLR (Results 1 – 25 of 154) sorted by relevance

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/hal_silabs-latest/simplicity_sdk/platform/service/hfxo_manager/src/
Dsl_hfxo_manager_hal_s2.c234 HFXO0->CTRL_CLR = HFXO_CTRL_EM23ONDEMAND; in sl_hfxo_manager_irq_handler()
266 HFXO0->CTRL_CLR = HFXO_CTRL_FORCEEN; in sl_hfxo_manager_irq_handler()
284 HFXO0->CTRL_CLR = HFXO_CTRL_DISONDEMAND; in sl_hfxo_manager_irq_handler()
291 HFXO0->CTRL_CLR = HFXO_CTRL_FORCEEN; in sl_hfxo_manager_irq_handler()
337 HFXO0->CTRL_CLR = HFXO_CTRL_FORCEEN; in sl_hfxo_manager_irq_handler()
344 HFXO0->CTRL_CLR = HFXO_MANAGER_CTRL_FORCERAWCLK; in sl_hfxo_manager_irq_handler()
365 HFXO0->CTRL_CLR = HFXO_CTRL_DISONDEMAND; in sl_hfxo_manager_irq_handler()
372 HFXO0->CTRL_CLR = HFXO_CTRL_FORCEEN; in sl_hfxo_manager_irq_handler()
386 HFXO0->CTRL_CLR = HFXO_CTRL_FORCEEN; in sl_hfxo_manager_irq_handler()
397 HFXO0->CTRL_CLR = HFXO_CTRL_DISONDEMAND; in sl_hfxo_manager_irq_handler()
[all …]
/hal_silabs-latest/simplicity_sdk/platform/service/power_manager/src/common/
Dsl_power_manager_em4.c287 DCDC->CTRL_CLR = DCDC_CTRL_MODE; in ramp_dvdd_and_switch_to_dcdc_bypass_mode()
304 DCDC->CTRL_CLR = DCDC_CTRL_MODE; in ramp_dvdd_and_switch_to_dcdc_bypass_mode()
Dsl_power_manager_execution_modes.c144 HFXO0->CTRL_CLR = HFXO_CTRL_FORCEEN; in sli_clock_manager_notify_hfxo_ready()
/hal_silabs-latest/simplicity_sdk/platform/emlib/inc/
Dem_chip.h379 DCDC->CTRL_CLR = DCDC_CTRL_MODE; in CHIP_Init()
423 ICACHE0->CTRL_CLR = _ICACHE_CTRL_CACHEDIS_MASK; in CHIP_Init()
Dem_dbg.h117 EMU->CTRL_CLR = EMU_CTRL_EM2DBGEN; in DBG_EM2DebugEnable()
Dem_lcd.h541 LCD->CTRL_CLR = LCD_CTRL_EN; in LCD_Enable()
963 LCD->CTRL_CLR = LCD_CTRL_DSC; in LCD_DSCEnable()
/hal_silabs-latest/gecko/emlib/inc/
Dem_dbg.h121 EMU->CTRL_CLR = EMU_CTRL_EM2DBGEN; in DBG_EM2DebugEnable()
Dem_lcd.h541 LCD->CTRL_CLR = LCD_CTRL_EN; in LCD_Enable()
963 LCD->CTRL_CLR = LCD_CTRL_DSC; in LCD_DSCEnable()
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32FG23/Include/
Defr32fg23_hfrco.h65 …__IOM uint32_t CTRL_CLR; /**< Ctrl Register … member
Defr32fg23_mpahbram.h72 …__IOM uint32_t CTRL_CLR; /**< Control register … member
Defr32fg23_gpcrc.h74 …__IOM uint32_t CTRL_CLR; /**< Control Register … member
Defr32fg23_icache.h69 …__IOM uint32_t CTRL_CLR; /**< Control Register … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_hfrco.h65 …__IOM uint32_t CTRL_CLR; /**< Ctrl Register … member
Defr32bg22_icache.h69 …__IOM uint32_t CTRL_CLR; /**< Control Register … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_hfrco.h65 …__IOM uint32_t CTRL_CLR; /**< Ctrl Register … member
Defr32mg24_gpcrc.h74 …__IOM uint32_t CTRL_CLR; /**< Control Register … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32ZG23/Include/
Defr32zg23_hfrco.h65 …__IOM uint32_t CTRL_CLR; /**< Ctrl Register … member
Defr32zg23_mpahbram.h72 …__IOM uint32_t CTRL_CLR; /**< Control register … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_hfrco.h65 …__IOM uint32_t CTRL_CLR; /**< Ctrl Register … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_hfrco.h65 …__IOM uint32_t CTRL_CLR; /**< Ctrl Register … member
Defr32mg21_gpcrc.h74 …__IOM uint32_t CTRL_CLR; /**< Control Register … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG29/Include/
Defr32bg29_hfrco.h65 …__IOM uint32_t CTRL_CLR; /**< Ctrl Register … member
Defr32bg29_mpahbram.h72 …__IOM uint32_t CTRL_CLR; /**< Control register … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG29/Include/
Defr32mg29_hfrco.h65 …__IOM uint32_t CTRL_CLR; /**< Ctrl Register … member
Defr32mg29_mpahbram.h72 …__IOM uint32_t CTRL_CLR; /**< Control register … member

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