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Searched refs:CORE_ATOMIC_BASE_PRIORITY_LEVEL (Results 1 – 6 of 6) sorted by relevance

/hal_silabs-latest/simplicity_sdk/platform/common/src/
Dsl_core_cortexm.c158 __set_BASEPRI(CORE_ATOMIC_BASE_PRIORITY_LEVEL << (8UL - __NVIC_PRIO_BITS)); in CORE_AtomicDisableIrq()
190 __set_BASEPRI(CORE_ATOMIC_BASE_PRIORITY_LEVEL << (8U - __NVIC_PRIO_BITS)); in CORE_EnterAtomic()
192 if ((irqState & (CORE_ATOMIC_BASE_PRIORITY_LEVEL << (8U - __NVIC_PRIO_BITS))) in CORE_EnterAtomic()
193 != (CORE_ATOMIC_BASE_PRIORITY_LEVEL << (8U - __NVIC_PRIO_BITS))) { in CORE_EnterAtomic()
222 if ((irqState & (CORE_ATOMIC_BASE_PRIORITY_LEVEL << (8U - __NVIC_PRIO_BITS))) in CORE_ExitAtomic()
223 != (CORE_ATOMIC_BASE_PRIORITY_LEVEL << (8U - __NVIC_PRIO_BITS))) { in CORE_ExitAtomic()
249 if (basepri >= (CORE_ATOMIC_BASE_PRIORITY_LEVEL << (8U - __NVIC_PRIO_BITS))) { in CORE_YieldAtomic()
280 || (__get_BASEPRI() >= (CORE_ATOMIC_BASE_PRIORITY_LEVEL in CORE_IrqIsDisabled()
/hal_silabs-latest/gecko/emlib/src/
Dem_core.c410 __set_BASEPRI(CORE_ATOMIC_BASE_PRIORITY_LEVEL << (8UL - __NVIC_PRIO_BITS)); in CORE_AtomicDisableIrq()
458 __set_BASEPRI(CORE_ATOMIC_BASE_PRIORITY_LEVEL << (8U - __NVIC_PRIO_BITS)); in CORE_EnterAtomic()
459 if ((irqState & (CORE_ATOMIC_BASE_PRIORITY_LEVEL << (8U - __NVIC_PRIO_BITS))) in CORE_EnterAtomic()
460 != (CORE_ATOMIC_BASE_PRIORITY_LEVEL << (8U - __NVIC_PRIO_BITS))) { in CORE_EnterAtomic()
494 if ((irqState & (CORE_ATOMIC_BASE_PRIORITY_LEVEL << (8U - __NVIC_PRIO_BITS))) in CORE_ExitAtomic()
495 != (CORE_ATOMIC_BASE_PRIORITY_LEVEL << (8U - __NVIC_PRIO_BITS))) { in CORE_ExitAtomic()
527 if (basepri >= (CORE_ATOMIC_BASE_PRIORITY_LEVEL << (8U - __NVIC_PRIO_BITS))) { in CORE_YieldAtomic()
755 || (__get_BASEPRI() >= (CORE_ATOMIC_BASE_PRIORITY_LEVEL
/hal_silabs-latest/gecko/emlib/inc/
Dem_core_generic.h52 #if !defined(CORE_ATOMIC_BASE_PRIORITY_LEVEL)
56 #define CORE_ATOMIC_BASE_PRIORITY_LEVEL 3 macro
/hal_silabs-latest/simplicity_sdk/platform/common/inc/
Dsl_core.h190 #if !defined(CORE_ATOMIC_BASE_PRIORITY_LEVEL)
194 #define CORE_ATOMIC_BASE_PRIORITY_LEVEL 3 macro
/hal_silabs-latest/simplicity_sdk/platform/security/sl_component/se_manager/src/
Dsl_se_manager.c70 #if (SE_MANAGER_USER_SEMBRX_IRQ_PRIORITY < CORE_ATOMIC_BASE_PRIORITY_LEVEL)
79 #define SE_MANAGER_SEMBRX_IRQ_PRIORITY (CORE_ATOMIC_BASE_PRIORITY_LEVEL)
/hal_silabs-latest/simplicity_sdk/platform/service/hfxo_manager/src/
Dsl_hfxo_manager_hal_s2.c136 NVIC_SetPriority(HFXO_IRQ_NUMBER, CORE_ATOMIC_BASE_PRIORITY_LEVEL - 1); in sli_hfxo_manager_init_hardware()