Searched refs:CONFIGMD_SET (Results 1 – 3 of 3) sorted by relevance
1412 basePointer->CONFIGMD_SET = SI32_SPI_B_CONFIGMD_OPMD_RECEIVE_U32; in _SI32_SPI_B_select_operation_mode_receive_only()1426 basePointer->CONFIGMD_SET = SI32_SPI_B_CONFIGMD_OPMD_TRANSMIT_U32; in _SI32_SPI_B_select_operation_mode_transmit_only()1439 basePointer->CONFIGMD_SET = SI32_SPI_B_CONFIGMD_OPMD_FLOWCONTROL_U32; in _SI32_SPI_B_select_operation_mode_flow_control()1454 basePointer->CONFIGMD_SET = SI32_SPI_B_CONFIGMD_AUTONSS_ENABLED_U32; in _SI32_SPI_B_enable_auto_nss_mode()1482 basePointer->CONFIGMD_SET = SI32_SPI_B_CONFIGMD_CTSEN_ENABLED_U32; in _SI32_SPI_B_enable_cts_flow_control()1508 basePointer->CONFIGMD_SET = SI32_SPI_B_CONFIGMD_FLOWMD_ENABLED_U32; in _SI32_SPI_B_enable_flow_control_mode()1536 basePointer->CONFIGMD_SET = SI32_SPI_B_CONFIGMD_ABORT_ENABLED_U32; in _SI32_SPI_B_enable_software_abort()1562 basePointer->CONFIGMD_SET = SI32_SPI_B_CONFIGMD_TXONREQ_ENABLED_U32; in _SI32_SPI_B_enable_transmit_data_on_request()1592 basePointer->CONFIGMD_SET = nsscnt << SI32_SPI_B_CONFIGMD_NSSCNT_SHIFT; in _SI32_SPI_B_select_nss_data_count()1611 basePointer->CONFIGMD_SET = nssdelay << SI32_SPI_B_CONFIGMD_NSSDELAY_SHIFT; in _SI32_SPI_B_select_nss_delay()[all …]
1547 basePointer->CONFIGMD_SET = SI32_SPI_B_CONFIGMD_OPMD_RECEIVE_U32;\1562 basePointer->CONFIGMD_SET = SI32_SPI_B_CONFIGMD_OPMD_TRANSMIT_U32;\1576 (basePointer->CONFIGMD_SET = SI32_SPI_B_CONFIGMD_OPMD_FLOWCONTROL_U32)1593 (basePointer->CONFIGMD_SET = SI32_SPI_B_CONFIGMD_AUTONSS_ENABLED_U32)1623 (basePointer->CONFIGMD_SET = SI32_SPI_B_CONFIGMD_CTSEN_ENABLED_U32)1649 (basePointer->CONFIGMD_SET = SI32_SPI_B_CONFIGMD_FLOWMD_ENABLED_U32)1679 (basePointer->CONFIGMD_SET = SI32_SPI_B_CONFIGMD_ABORT_ENABLED_U32)1705 (basePointer->CONFIGMD_SET = SI32_SPI_B_CONFIGMD_TXONREQ_ENABLED_U32)1741 basePointer->CONFIGMD_SET = nsscnt << SI32_SPI_B_CONFIGMD_NSSCNT_SHIFT;\1767 basePointer->CONFIGMD_SET = nssdelay << SI32_SPI_B_CONFIGMD_NSSDELAY_SHIFT;\[all …]
767 volatile uint32_t CONFIGMD_SET; member
