Searched refs:CMU_CLKEN0_HFXO0 (Results 1 – 13 of 13) sorted by relevance
402 bool hfxo0ClkIsOff = (CMU->CLKEN0 & CMU_CLKEN0_HFXO0) == 0; in CHIP_Init()403 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in CHIP_Init()410 CMU->CLKEN0_CLR = CMU_CLKEN0_HFXO0; in CHIP_Init()
406 bool hfxo0ClkIsOff = (CMU->CLKEN0 & CMU_CLKEN0_HFXO0) == 0; in CHIP_Init()407 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in CHIP_Init()414 CMU->CLKEN0_CLR = CMU_CLKEN0_HFXO0; in CHIP_Init()
140 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in sli_hfxo_manager_init_hardware()
195 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in sli_power_manager_init_hardware()
1493 #if defined(_CMU_CLKEN0_MASK) && defined(CMU_CLKEN0_HFXO0) in sli_em_cmu_HFXOSetForceEnable()1494 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in sli_em_cmu_HFXOSetForceEnable()1586 #if defined(CMU_CLKEN0_HFXO0) in CMU_ClockSelectSet()1587 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in CMU_ClockSelectSet()2989 #if defined(CMU_CLKEN0_HFXO0) in CMU_HFXOInit()2991 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in CMU_HFXOInit()3751 #if defined(CMU_CLKEN0_HFXO0) in CMU_OscillatorTuningGet()3752 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in CMU_OscillatorTuningGet()3834 #if defined(CMU_CLKEN0_HFXO0) in CMU_OscillatorTuningSet()3835 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in CMU_OscillatorTuningSet()
1469 #if defined(_CMU_CLKEN0_MASK) && defined(CMU_CLKEN0_HFXO0) in sli_em_cmu_HFXOSetForceEnable()1470 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in sli_em_cmu_HFXOSetForceEnable()1561 #if defined(CMU_CLKEN0_HFXO0) in CMU_ClockSelectSet()1562 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in CMU_ClockSelectSet()2960 #if defined(CMU_CLKEN0_HFXO0) in CMU_HFXOInit()2962 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in CMU_HFXOInit()3700 #if defined(CMU_CLKEN0_HFXO0) in CMU_OscillatorTuningGet()3701 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in CMU_OscillatorTuningGet()3783 #if defined(CMU_CLKEN0_HFXO0) in CMU_OscillatorTuningSet()3784 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in CMU_OscillatorTuningSet()
493 #define CMU_CLKEN0_HFXO0 (0x1UL << 19) /**< Enable… macro
497 #define CMU_CLKEN0_HFXO0 (0x1UL << 19) /**< Enable… macro
497 #define CMU_CLKEN0_HFXO0 (0x1UL << 19) /**< Enab… macro
538 #define CMU_CLKEN0_HFXO0 (0x1UL << 20) /**< Enabl… macro
530 #define CMU_CLKEN0_HFXO0 (0x1UL << 20) /**< Enabl… macro