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Searched refs:CMU_BASE (Results 1 – 25 of 418) sorted by relevance

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/hal_silabs-latest/gecko/emlib/inc/
Dem_chip.h283 *(volatile uint32_t *)(CMU_BASE + 0x28CUL) = 608; in CHIP_Init()
284 *(volatile uint32_t *)(CMU_BASE + 0x290UL) = 356250; in CHIP_Init()
285 *(volatile uint32_t *)(CMU_BASE + 0x2F0UL) = 0x04000118; in CHIP_Init()
286 *(volatile uint32_t *)(CMU_BASE + 0x2F8UL) = 0x08328400; in CHIP_Init()
/hal_silabs-latest/simplicity_sdk/platform/emlib/inc/
Dem_chip.h287 *(volatile uint32_t *)(CMU_BASE + 0x28CUL) = 608; in CHIP_Init()
288 *(volatile uint32_t *)(CMU_BASE + 0x290UL) = 356250; in CHIP_Init()
289 *(volatile uint32_t *)(CMU_BASE + 0x2F0UL) = 0x04000118; in CHIP_Init()
290 *(volatile uint32_t *)(CMU_BASE + 0x2F8UL) = 0x08328400; in CHIP_Init()
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b100f128gm32.h299 #define CMU_BASE (0x400E4000UL) /**< CMU base address */ macro
336 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defm32pg1b100f128im32.h299 #define CMU_BASE (0x400E4000UL) /**< CMU base address */ macro
336 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defm32pg1b100f256gm32.h299 #define CMU_BASE (0x400E4000UL) /**< CMU base address */ macro
336 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defm32pg1b100f256im32.h299 #define CMU_BASE (0x400E4000UL) /**< CMU base address */ macro
336 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defm32pg1b200f128gm32.h301 #define CMU_BASE (0x400E4000UL) /**< CMU base address */ macro
338 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defm32pg1b200f128gm48.h301 #define CMU_BASE (0x400E4000UL) /**< CMU base address */ macro
338 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defm32pg1b200f128im32.h301 #define CMU_BASE (0x400E4000UL) /**< CMU base address */ macro
338 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defm32pg1b200f256im32.h301 #define CMU_BASE (0x400E4000UL) /**< CMU base address */ macro
338 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defm32pg1b200f256im48.h301 #define CMU_BASE (0x400E4000UL) /**< CMU base address */ macro
338 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defm32pg1b200f256gm32.h301 #define CMU_BASE (0x400E4000UL) /**< CMU base address */ macro
338 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defm32pg1b200f256gm48.h301 #define CMU_BASE (0x400E4000UL) /**< CMU base address */ macro
338 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg309f32.h289 #define CMU_BASE (0x400C8000UL) /**< CMU base address */ macro
326 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defm32hg309f64.h289 #define CMU_BASE (0x400C8000UL) /**< CMU base address */ macro
326 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defm32hg310f32.h289 #define CMU_BASE (0x400C8000UL) /**< CMU base address */ macro
326 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defm32hg310f64.h289 #define CMU_BASE (0x400C8000UL) /**< CMU base address */ macro
326 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defm32hg322f32.h289 #define CMU_BASE (0x400C8000UL) /**< CMU base address */ macro
326 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defm32hg322f64.h289 #define CMU_BASE (0x400C8000UL) /**< CMU base address */ macro
326 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defm32hg350f32.h289 #define CMU_BASE (0x400C8000UL) /**< CMU base address */ macro
326 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defm32hg350f64.h289 #define CMU_BASE (0x400C8000UL) /**< CMU base address */ macro
326 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p133f256gm32.h315 #define CMU_BASE (0x400E4000UL) /**< CMU base address */ macro
352 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defr32fg1p133f256gm48.h315 #define CMU_BASE (0x400E4000UL) /**< CMU base address */ macro
352 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defr32fg1p133f64gm48.h315 #define CMU_BASE (0x400E4000UL) /**< CMU base address */ macro
352 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
Defr32fg1p132f64gm32.h315 #define CMU_BASE (0x400E4000UL) /**< CMU base address */ macro
352 #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */

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